2021-04-23 21:47:54 +00:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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2021-05-03 23:53:00 +00:00
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#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
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2021-12-05 22:24:54 +00:00
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#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
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2021-04-23 21:47:54 +00:00
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#include "shader_recompiler/frontend/ir/modifiers.h"
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namespace Shader::Backend::SPIRV {
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namespace {
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Id Image(EmitContext& ctx, const IR::Value& index, IR::TextureInstInfo info) {
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if (!index.IsImmediate()) {
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throw NotImplementedException("Indirect image indexing");
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}
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if (info.type == TextureType::Buffer) {
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const ImageBufferDefinition def{ctx.image_buffers.at(index.U32())};
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return def.id;
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} else {
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const ImageDefinition def{ctx.images.at(index.U32())};
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return def.id;
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}
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}
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std::pair<Id, Id> AtomicArgs(EmitContext& ctx) {
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const Id scope{ctx.Const(static_cast<u32>(spv::Scope::Device))};
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const Id semantics{ctx.u32_zero_value};
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return {scope, semantics};
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}
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Id ImageAtomicU32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const Id image{Image(ctx, index, info)};
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const Id pointer{ctx.OpImageTexelPointer(ctx.image_u32, image, coords, ctx.Const(0U))};
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return (ctx.*atomic_func)(ctx.U32[1], pointer, scope, semantics, value);
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}
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} // Anonymous namespace
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Id EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicIAdd);
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}
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Id EmitImageAtomicSMin32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicSMin);
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}
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Id EmitImageAtomicUMin32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicUMin);
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}
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Id EmitImageAtomicSMax32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicSMax);
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}
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Id EmitImageAtomicUMax32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicUMax);
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}
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Id EmitImageAtomicInc32(EmitContext&, IR::Inst*, const IR::Value&, Id, Id) {
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// TODO: This is not yet implemented
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitImageAtomicDec32(EmitContext&, IR::Inst*, const IR::Value&, Id, Id) {
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// TODO: This is not yet implemented
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitImageAtomicAnd32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicAnd);
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}
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Id EmitImageAtomicOr32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicOr);
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}
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Id EmitImageAtomicXor32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicXor);
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}
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Id EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id value) {
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return ImageAtomicU32(ctx, inst, index, coords, value, &Sirit::Module::OpAtomicExchange);
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}
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Id EmitBindlessImageAtomicIAdd32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicSMin32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicUMin32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicSMax32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicUMax32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicInc32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicDec32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicAnd32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicOr32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicXor32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBindlessImageAtomicExchange32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicIAdd32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicSMin32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicUMin32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicSMax32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicUMax32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicInc32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicDec32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicAnd32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicOr32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicXor32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitBoundImageAtomicExchange32(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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} // namespace Shader::Backend::SPIRV
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