video_core: Optimize maxwell drawing trigger mechanism
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@ -126,6 +126,7 @@ void Maxwell3D::InitializeRegisterDefaults() {
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draw_command[MAXWELL3D_REG_INDEX(draw_inline_index)] = true;
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draw_command[MAXWELL3D_REG_INDEX(inline_index_2x16.even)] = true;
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draw_command[MAXWELL3D_REG_INDEX(inline_index_4x8.index0)] = true;
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draw_command[MAXWELL3D_REG_INDEX(draw.instance_id)] = true;
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}
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void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool is_last_call) {
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@ -288,31 +289,58 @@ void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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const u32 argument = ProcessShadowRam(method, method_argument);
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ProcessDirtyRegisters(method, argument);
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if (draw_command[method]) {
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regs.reg_array[method] = method_argument;
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deferred_draw_method.push_back(method);
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auto u32_to_u8 = [&](const u32 argument) {
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inline_index_draw_indexes.push_back(static_cast<u8>(argument & 0x000000ff));
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inline_index_draw_indexes.push_back(static_cast<u8>((argument & 0x0000ff00) >> 8));
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inline_index_draw_indexes.push_back(static_cast<u8>((argument & 0x00ff0000) >> 16));
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inline_index_draw_indexes.push_back(static_cast<u8>((argument & 0xff000000) >> 24));
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auto update_inline_index = [&](const u32 index) {
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inline_index_draw_indexes.push_back(static_cast<u8>(index & 0x000000ff));
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inline_index_draw_indexes.push_back(static_cast<u8>((index & 0x0000ff00) >> 8));
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inline_index_draw_indexes.push_back(static_cast<u8>((index & 0x00ff0000) >> 16));
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inline_index_draw_indexes.push_back(static_cast<u8>((index & 0xff000000) >> 24));
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draw_mode = DrawMode::InlineIndex;
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};
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if (MAXWELL3D_REG_INDEX(draw_inline_index) == method) {
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u32_to_u8(method_argument);
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} else if (MAXWELL3D_REG_INDEX(inline_index_2x16.even) == method) {
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u32_to_u8(regs.inline_index_2x16.even);
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u32_to_u8(regs.inline_index_2x16.odd);
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} else if (MAXWELL3D_REG_INDEX(inline_index_4x8.index0) == method) {
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u32_to_u8(regs.inline_index_4x8.index0);
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u32_to_u8(regs.inline_index_4x8.index1);
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u32_to_u8(regs.inline_index_4x8.index2);
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u32_to_u8(regs.inline_index_4x8.index3);
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switch (method) {
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case MAXWELL3D_REG_INDEX(draw.end):
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switch (draw_mode) {
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case DrawMode::General:
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ProcessDraw(1);
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break;
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case DrawMode::InlineIndex:
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regs.index_buffer.count = static_cast<u32>(inline_index_draw_indexes.size() / 4);
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regs.index_buffer.format = Regs::IndexFormat::UnsignedInt;
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ProcessDraw(1);
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inline_index_draw_indexes.clear();
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break;
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case DrawMode::Instance:
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break;
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}
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break;
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case MAXWELL3D_REG_INDEX(draw_inline_index):
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update_inline_index(method_argument);
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break;
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case MAXWELL3D_REG_INDEX(inline_index_2x16.even):
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update_inline_index(regs.inline_index_2x16.even);
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update_inline_index(regs.inline_index_2x16.odd);
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break;
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case MAXWELL3D_REG_INDEX(inline_index_4x8.index0):
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update_inline_index(regs.inline_index_4x8.index0);
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update_inline_index(regs.inline_index_4x8.index1);
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update_inline_index(regs.inline_index_4x8.index2);
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update_inline_index(regs.inline_index_4x8.index3);
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break;
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case MAXWELL3D_REG_INDEX(draw.instance_id):
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draw_mode =
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) ||
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Unchanged)
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? DrawMode::Instance
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: DrawMode::General;
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break;
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}
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} else {
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ProcessDeferredDraw();
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const u32 argument = ProcessShadowRam(method, method_argument);
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ProcessDirtyRegisters(method, argument);
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ProcessMethodCall(method, argument, method_argument, is_last_call);
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}
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}
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@ -626,57 +654,27 @@ void Maxwell3D::ProcessDraw(u32 instance_count) {
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}
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void Maxwell3D::ProcessDeferredDraw() {
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if (deferred_draw_method.empty()) {
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if (draw_mode != DrawMode::Instance || deferred_draw_method.empty()) {
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return;
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}
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enum class DrawMode {
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Undefined,
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General,
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Instance,
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};
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DrawMode draw_mode{DrawMode::Undefined};
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u32 method_count = static_cast<u32>(deferred_draw_method.size());
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u32 method = deferred_draw_method[method_count - 1];
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if (MAXWELL3D_REG_INDEX(draw.end) != method) {
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return;
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}
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draw_mode = (regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Subsequent) ||
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(regs.draw.instance_id == Maxwell3D::Regs::Draw::InstanceId::Unchanged)
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? DrawMode::Instance
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: DrawMode::General;
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u32 instance_count = 0;
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if (draw_mode == DrawMode::Instance) {
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u32 instance_count = 1;
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u32 vertex_buffer_count = 0;
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u32 index_buffer_count = 0;
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for (u32 index = 0; index < method_count; ++index) {
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method = deferred_draw_method[index];
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u32 method = deferred_draw_method[index];
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if (method == MAXWELL3D_REG_INDEX(vertex_buffer.count)) {
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instance_count = ++vertex_buffer_count;
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} else if (method == MAXWELL3D_REG_INDEX(index_buffer.count)) {
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instance_count = ++index_buffer_count;
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}
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}
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ASSERT_MSG(!(vertex_buffer_count && index_buffer_count),
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"Instance both indexed and direct?");
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} else {
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instance_count = 1;
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for (u32 index = 0; index < method_count; ++index) {
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method = deferred_draw_method[index];
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if (MAXWELL3D_REG_INDEX(draw_inline_index) == method ||
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MAXWELL3D_REG_INDEX(inline_index_2x16.even) == method ||
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MAXWELL3D_REG_INDEX(inline_index_4x8.index0) == method) {
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regs.index_buffer.count = static_cast<u32>(inline_index_draw_indexes.size() / 4);
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regs.index_buffer.format = Regs::IndexFormat::UnsignedInt;
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break;
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}
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}
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}
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ASSERT_MSG(!(vertex_buffer_count && index_buffer_count), "Instance both indexed and direct?");
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ProcessDraw(instance_count);
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deferred_draw_method.clear();
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inline_index_draw_indexes.clear();
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}
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} // namespace Tegra::Engines
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@ -3148,10 +3148,12 @@ private:
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/// Handles use of topology overrides (e.g., to avoid using a topology assigned from a macro)
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void ProcessTopologyOverride();
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void ProcessDraw(u32 instance_count = 1);
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/// Handles deferred draw(e.g., instance draw).
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void ProcessDeferredDraw();
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/// Handles a draw.
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void ProcessDraw(u32 instance_count = 1);
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/// Returns a query's value or an empty object if the value will be deferred through a cache.
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std::optional<u64> GetQueryResult();
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@ -3178,6 +3180,8 @@ private:
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std::array<bool, Regs::NUM_REGS> draw_command{};
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std::vector<u32> deferred_draw_method;
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enum class DrawMode : u32 { General = 0, Instance, InlineIndex };
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DrawMode draw_mode{DrawMode::General};
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};
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#define ASSERT_REG_POSITION(field_name, position) \
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