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yuzu-mainline
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Remove pipeline.gpu_mode and fix minor issues

This commit is contained in:
James Rowe 2017-09-23 09:28:20 -06:00
parent ad0b57f407
commit 19d41dcc6e
1 changed files with 2 additions and 12 deletions
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14
src/video_core/command_processor.cpp
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@ -245,7 +245,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
g_state.geometry_pipeline.SubmitVertex(output);
// TODO: If drawing after every immediate mode triangle kills performance,
// change it to flush triangles whenever a draing config register changes
// change it to flush triangles whenever a drawing config register changes
// See: https://github.com/citra-emu/citra/pull/2866#issuecomment-327011550
VideoCore::g_renderer->Rasterizer()->DrawTriangles();
if (g_debug_context) {
@ -259,16 +259,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
}
case PICA_REG_INDEX(pipeline.gpu_mode):
if (regs.pipeline.gpu_mode == PipelineRegs::GPUMode::Configuring) {
MICROPROFILE_SCOPE(GPU_Drawing);
// Draw immediate mode triangles when GPU Mode is set to GPUMode::Configuring
VideoCore::g_renderer->Rasterizer()->DrawTriangles();
if (g_debug_context) {
g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
}
}
// This register likely just enables vertex processing and doesn't need any special handling
break;
case PICA_REG_INDEX_WORKAROUND(pipeline.command_buffer.trigger[0], 0x23c):
@ -407,7 +398,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
range.second, range.first);
}
MICROPROFILE_SCOPE(GPU_Drawing);
VideoCore::g_renderer->Rasterizer()->DrawTriangles();
if (g_debug_context) {
g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);