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arm: Remove ARM26 support.

This will never be used. 32-bit is the norm.
This commit is contained in:
Lioncash 2015-02-11 12:19:49 -05:00
parent c51b23b052
commit 49a22acd02
2 changed files with 4 additions and 45 deletions

View File

@ -82,14 +82,6 @@ ARMul_State* ARMul_NewState(ARMul_State* state)
state->Inted = 3;
state->LastInted = 3;
#ifdef ARM61
state->prog32Sig = LOW;
state->data32Sig = LOW;
#else
state->prog32Sig = HIGH;
state->data32Sig = HIGH;
#endif
state->lateabtSig = HIGH;
state->bigendSig = LOW;
@ -102,14 +94,6 @@ ARMul_State* ARMul_NewState(ARMul_State* state)
void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
{
if (properties & ARM_Fix26_Prop) {
state->prog32Sig = LOW;
state->data32Sig = LOW;
} else {
state->prog32Sig = HIGH;
state->data32Sig = HIGH;
}
state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) != 0;
state->is_v5 = (properties & ARM_v5_Prop) != 0;
state->is_v5e = (properties & ARM_v5e_Prop) != 0;
@ -132,15 +116,10 @@ void ARMul_SelectProcessor(ARMul_State* state, unsigned properties)
void ARMul_Reset(ARMul_State* state)
{
state->NextInstr = 0;
if (state->prog32Sig) {
state->Reg[15] = 0;
state->Cpsr = INTBITS | SVC32MODE;
state->Mode = SVC32MODE;
} else {
state->Reg[15] = R15INTBITS | SVC26MODE;
state->Cpsr = INTBITS | SVC26MODE;
state->Mode = SVC26MODE;
}
state->Bank = SVCBANK;
FLUSHPIPE;

View File

@ -149,8 +149,6 @@ struct ARMul_State
unsigned abortSig;
unsigned NtransSig;
unsigned bigendSig;
unsigned prog32Sig;
unsigned data32Sig;
unsigned syscallSig;
/* 2004-05-09 chy
@ -227,7 +225,6 @@ typedef ARMul_State arm_core_t;
\***************************************************************************/
enum {
ARM_Fix26_Prop = 0x01,
ARM_Nexec_Prop = 0x02,
ARM_Debug_Prop = 0x10,
ARM_Isync_Prop = ARM_Debug_Prop,
@ -242,19 +239,6 @@ enum {
ARM_iWMMXt_Prop = 0x800,
ARM_PXA27X_Prop = 0x1000,
ARM_v7_Prop = 0x2000,
// ARM2 family
ARM2 = ARM_Fix26_Prop,
ARM2as = ARM2,
ARM61 = ARM2,
ARM3 = ARM2,
// ARM6 family
ARM6 = ARM_Lock_Prop,
ARM60 = ARM6,
ARM600 = ARM6,
ARM610 = ARM6,
ARM620 = ARM6
};
/***************************************************************************\
@ -287,10 +271,6 @@ enum {
\***************************************************************************/
enum {
USER26MODE = 0,
FIQ26MODE = 1,
IRQ26MODE = 2,
SVC26MODE = 3,
USER32MODE = 16,
FIQ32MODE = 17,
IRQ32MODE = 18,