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Vulkan: Implement Alpha coverage

This commit is contained in:
Fernando Sahmkow 2022-12-05 12:23:56 +01:00
parent a52d0b82a6
commit 6352c5dc31
3 changed files with 6 additions and 2 deletions
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2
src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
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@ -93,6 +93,8 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
provoking_vertex_last.Assign(regs.provoking_vertex == Maxwell::ProvokingVertex::Last ? 1 : 0); provoking_vertex_last.Assign(regs.provoking_vertex == Maxwell::ProvokingVertex::Last ? 1 : 0);
conservative_raster_enable.Assign(regs.conservative_raster_enable != 0 ? 1 : 0); conservative_raster_enable.Assign(regs.conservative_raster_enable != 0 ? 1 : 0);
smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0); smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0);
alpha_to_coverage_enabled.Assign(regs.anti_alias_alpha_control.alpha_to_coverage != 0 ? 1 : 0);
alpha_to_one_enabled.Assign(regs.anti_alias_alpha_control.alpha_to_one != 0 ? 1 : 0);
for (size_t i = 0; i < regs.rt.size(); ++i) { for (size_t i = 0; i < regs.rt.size(); ++i) {
color_formats[i] = static_cast<u8>(regs.rt[i].format); color_formats[i] = static_cast<u8>(regs.rt[i].format);

2
src/video_core/renderer_vulkan/fixed_pipeline_state.h
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@ -195,6 +195,8 @@ struct FixedPipelineState {
BitField<12, 1, u32> provoking_vertex_last; BitField<12, 1, u32> provoking_vertex_last;
BitField<13, 1, u32> conservative_raster_enable; BitField<13, 1, u32> conservative_raster_enable;
BitField<14, 1, u32> smooth_lines; BitField<14, 1, u32> smooth_lines;
BitField<15, 1, u32> alpha_to_coverage_enabled;
BitField<16, 1, u32> alpha_to_one_enabled;
}; };
std::array<u8, Maxwell::NumRenderTargets> color_formats; std::array<u8, Maxwell::NumRenderTargets> color_formats;

4
src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
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@ -714,8 +714,8 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
.sampleShadingEnable = VK_FALSE, .sampleShadingEnable = VK_FALSE,
.minSampleShading = 0.0f, .minSampleShading = 0.0f,
.pSampleMask = nullptr, .pSampleMask = nullptr,
.alphaToCoverageEnable = VK_FALSE, .alphaToCoverageEnable = key.state.alpha_to_coverage_enabled != 0 ? VK_TRUE : VK_FALSE,
.alphaToOneEnable = VK_FALSE, .alphaToOneEnable = key.state.alpha_to_one_enabled != 0 ? VK_TRUE : VK_FALSE,
}; };
const VkPipelineDepthStencilStateCreateInfo depth_stencil_ci{ const VkPipelineDepthStencilStateCreateInfo depth_stencil_ci{
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,