yuzu-emu
/
yuzu-mainline
Archived
1
0
Fork 0
Code

gl_shader_decompiler: Implement MOV32_IMM instruction.

This commit is contained in:
bunnei 2018-04-26 23:21:17 -04:00
parent 3d9126ba87
commit a7b5ab4d9a
2 changed files with 7 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/video_core/engines/shader_bytecode.h
View File

@ -290,7 +290,7 @@ public:
MOV_C,
MOV_R,
MOV_IMM,
MOV32I,
MOV32_IMM,
SHR_C,
SHR_R,
SHR_IMM,
@ -445,7 +445,7 @@ private:
INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
INST("000000010000----", Id::MOV32I, Type::Arithmetic, "MOV32I"),
INST("000000010000----", Id::MOV32_IMM, Type::Arithmetic, "MOV32_IMM"),
INST("0100110000101---", Id::SHR_C, Type::Arithmetic, "SHR_C"),
INST("0101110000101---", Id::SHR_R, Type::Arithmetic, "SHR_R"),
INST("0011100-00101---", Id::SHR_IMM, Type::Arithmetic, "SHR_IMM"),

5
src/video_core/renderer_opengl/gl_shader_decompiler.cpp
View File

@ -620,6 +620,11 @@ private:
}
switch (opcode->GetId()) {
case OpCode::Id::MOV32_IMM: {
// mov32i doesn't have abs or neg bits.
regs.SetRegisterToFloat(instr.gpr0, 0, GetImmediate32(instr), 1, 1);
break;
}
case OpCode::Id::FMUL_C:
case OpCode::Id::FMUL_R:
case OpCode::Id::FMUL_IMM: {