306 lines
10 KiB
C++
306 lines
10 KiB
C++
// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <map>
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#include "common/common.h"
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#include "core/mem_map.h"
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#include "core/hw/hw.h"
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#include "hle/config_mem.h"
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namespace Memory {
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std::map<u32, MemoryBlock> g_heap_map;
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std::map<u32, MemoryBlock> g_heap_gsp_map;
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std::map<u32, MemoryBlock> g_shared_map;
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/// Convert a physical address to virtual address
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VAddr PhysicalToVirtualAddress(const PAddr addr) {
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// to virtual address translations here. This is quite hacky, but necessary until we implement
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// proper MMU emulation.
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// TODO: Screw it, I'll let bunnei figure out how to do this properly.
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if ((addr >= VRAM_PADDR) && (addr < VRAM_PADDR_END)) {
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return addr - VRAM_PADDR + VRAM_VADDR;
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}else if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
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return addr - FCRAM_PADDR + FCRAM_VADDR;
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}
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ERROR_LOG(MEMMAP, "Unknown physical address @ 0x%08x", addr);
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return addr;
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}
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/// Convert a physical address to virtual address
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PAddr VirtualToPhysicalAddress(const VAddr addr) {
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// to virtual address translations here. This is quite hacky, but necessary until we implement
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// proper MMU emulation.
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// TODO: Screw it, I'll let bunnei figure out how to do this properly.
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if ((addr >= VRAM_VADDR) && (addr < VRAM_VADDR_END)) {
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return addr - 0x07000000;
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} else if ((addr >= FCRAM_VADDR) && (addr < FCRAM_VADDR_END)) {
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return addr - FCRAM_VADDR + FCRAM_PADDR;
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}
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ERROR_LOG(MEMMAP, "Unknown virtual address @ 0x%08x", addr);
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return addr;
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}
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template <typename T>
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inline void Read(T &var, const VAddr vaddr) {
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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// TODO: Make sure this represents the mirrors in a correct way.
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// Could just do a base-relative read, too.... TODO
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// Kernel memory command buffer
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if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
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var = *((const T*)&g_kernel_mem[vaddr & KERNEL_MEMORY_MASK]);
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// Hardware I/O register reads
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// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
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} else if ((vaddr >= HARDWARE_IO_VADDR) && (vaddr < HARDWARE_IO_VADDR_END)) {
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HW::Read<T>(var, vaddr);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) {
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var = *((const T*)&g_exefs_code[vaddr & EXEFS_CODE_MASK]);
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// FCRAM - GSP heap
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} else if ((vaddr >= HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
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var = *((const T*)&g_heap_gsp[vaddr & HEAP_GSP_MASK]);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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var = *((const T*)&g_heap[vaddr & HEAP_MASK]);
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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var = *((const T*)&g_shared_mem[vaddr & SHARED_MEMORY_MASK]);
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// System memory
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} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
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var = *((const T*)&g_system_mem[vaddr & SYSTEM_MEMORY_MASK]);
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// Config memory
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} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
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ConfigMem::Read<T>(var, vaddr);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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var = *((const T*)&g_vram[vaddr & VRAM_MASK]);
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} else {
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ERROR_LOG(MEMMAP, "unknown Read%d @ 0x%08X", sizeof(var) * 8, vaddr);
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}
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}
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template <typename T>
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inline void Write(const VAddr vaddr, const T data) {
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// Kernel memory command buffer
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if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
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*(T*)&g_kernel_mem[vaddr & KERNEL_MEMORY_MASK] = data;
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// Hardware I/O register writes
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// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
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} else if ((vaddr >= HARDWARE_IO_VADDR) && (vaddr < HARDWARE_IO_VADDR_END)) {
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HW::Write<T>(vaddr, data);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) {
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*(T*)&g_exefs_code[vaddr & EXEFS_CODE_MASK] = data;
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// FCRAM - GSP heap
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} else if ((vaddr >= HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
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*(T*)&g_heap_gsp[vaddr & HEAP_GSP_MASK] = data;
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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*(T*)&g_heap[vaddr & HEAP_MASK] = data;
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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*(T*)&g_shared_mem[vaddr & SHARED_MEMORY_MASK] = data;
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// System memory
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} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
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*(T*)&g_system_mem[vaddr & SYSTEM_MEMORY_MASK] = data;
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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*(T*)&g_vram[vaddr & VRAM_MASK] = data;
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//} else if ((vaddr & 0xFFF00000) == 0x1FF00000) {
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// _assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
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//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
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// _assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
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//} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
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// _assert_msg_(MEMMAP, false, "umimplemented write to shared page");
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// Error out...
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} else {
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ERROR_LOG(MEMMAP, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, vaddr);
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}
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}
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u8 *GetPointer(const VAddr vaddr) {
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// Kernel memory command buffer
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if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
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return g_kernel_mem + (vaddr & KERNEL_MEMORY_MASK);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) {
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return g_exefs_code + (vaddr & EXEFS_CODE_MASK);
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// FCRAM - GSP heap
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} else if ((vaddr >= HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
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return g_heap_gsp + (vaddr & HEAP_GSP_MASK);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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return g_heap + (vaddr & HEAP_MASK);
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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return g_shared_mem + (vaddr & SHARED_MEMORY_MASK);
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// System memory
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} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
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return g_system_mem + (vaddr & SYSTEM_MEMORY_MASK);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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return g_vram + (vaddr & VRAM_MASK);
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} else {
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ERROR_LOG(MEMMAP, "unknown GetPointer @ 0x%08x", vaddr);
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return 0;
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}
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}
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/**
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* Maps a block of memory on the heap
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* @param size Size of block in bytes
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* @param operation Memory map operation type
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* @param flags Memory allocation flags
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*/
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u32 MapBlock_Heap(u32 size, u32 operation, u32 permissions) {
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MemoryBlock block;
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block.base_address = HEAP_VADDR;
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block.size = size;
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block.operation = operation;
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block.permissions = permissions;
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if (g_heap_map.size() > 0) {
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const MemoryBlock last_block = g_heap_map.rbegin()->second;
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block.address = last_block.address + last_block.size;
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}
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g_heap_map[block.GetVirtualAddress()] = block;
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return block.GetVirtualAddress();
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}
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/**
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* Maps a block of memory on the GSP heap
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* @param size Size of block in bytes
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* @param operation Memory map operation type
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* @param flags Memory allocation flags
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*/
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u32 MapBlock_HeapGSP(u32 size, u32 operation, u32 permissions) {
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MemoryBlock block;
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block.base_address = HEAP_GSP_VADDR;
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block.size = size;
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block.operation = operation;
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block.permissions = permissions;
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if (g_heap_gsp_map.size() > 0) {
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const MemoryBlock last_block = g_heap_gsp_map.rbegin()->second;
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block.address = last_block.address + last_block.size;
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}
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g_heap_gsp_map[block.GetVirtualAddress()] = block;
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return block.GetVirtualAddress();
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}
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u8 Read8(const VAddr addr) {
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u8 data = 0;
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Read<u8>(data, addr);
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return data;
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}
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u16 Read16(const VAddr addr) {
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u16_le data = 0;
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Read<u16_le>(data, addr);
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// Check for 16-bit unaligned memory reads...
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if (addr & 1) {
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// TODO(bunnei): Implement 16-bit unaligned memory reads
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ERROR_LOG(MEMMAP, "16-bit unaligned memory reads are not implemented!");
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}
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return (u16)data;
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}
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u32 Read32(const VAddr addr) {
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u32_le data = 0;
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Read<u32_le>(data, addr);
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// Check for 32-bit unaligned memory reads...
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if (addr & 3) {
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// ARM allows for unaligned memory reads, however older ARM architectures read out memory
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// from unaligned addresses in a shifted way. Our ARM CPU core (SkyEye) corrects for this,
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// so therefore expects the memory to be read out in this manner.
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// TODO(bunnei): Determine if this is necessary - perhaps it is OK to remove this from both
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// SkyEye and here?
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int shift = (addr & 3) * 8;
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data = (data << shift) | (data >> (32 - shift));
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}
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return (u32)data;
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}
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u32 Read8_ZX(const VAddr addr) {
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return (u32)Read8(addr);
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}
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u32 Read16_ZX(const VAddr addr) {
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return (u32)Read16(addr);
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}
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void Write8(const VAddr addr, const u8 data) {
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Write<u8>(addr, data);
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}
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void Write16(const VAddr addr, const u16 data) {
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Write<u16_le>(addr, data);
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}
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void Write32(const VAddr addr, const u32 data) {
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Write<u32_le>(addr, data);
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}
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void Write64(const VAddr addr, const u64 data) {
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Write<u64_le>(addr, data);
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}
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void WriteBlock(const VAddr addr, const u8* data, const size_t size) {
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u32 offset = 0;
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while (offset < (size & ~3)) {
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Write32(addr + offset, *(u32*)&data[offset]);
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offset += 4;
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}
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if (size & 2) {
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Write16(addr + offset, *(u16*)&data[offset]);
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offset += 2;
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}
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if (size & 1)
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Write8(addr + offset, data[offset]);
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}
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} // namespace
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