Core: Initial implementation of device memory mapping
This commit is contained in:
parent
3092855d5a
commit
2f0418c101
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@ -45,6 +45,7 @@ using f32 = float; ///< 32-bit floating point
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using f64 = double; ///< 64-bit floating point
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using VAddr = u64; ///< Represents a pointer in the userspace virtual address space.
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using DAddr = u64; ///< Represents a pointer in the device specific virtual address space.
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using PAddr = u64; ///< Represents a pointer in the ARM11 physical address space.
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using GPUVAddr = u64; ///< Represents a pointer in the GPU virtual address space.
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@ -31,6 +31,12 @@ public:
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DramMemoryMap::Base;
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}
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template <typename T>
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PAddr GetRawPhysicalAddr(const T* ptr) const {
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return static_cast<PAddr>(reinterpret_cast<uintptr_t>(ptr) -
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reinterpret_cast<uintptr_t>(buffer.BackingBasePointer()));
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}
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template <typename T>
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T* GetPointer(Common::PhysicalAddress addr) {
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return reinterpret_cast<T*>(buffer.BackingBasePointer() +
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@ -43,6 +49,16 @@ public:
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(GetInteger(addr) - DramMemoryMap::Base));
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}
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template <typename T>
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T* GetPointerFromRaw(PAddr addr) {
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return reinterpret_cast<T*>(buffer.BackingBasePointer() + addr);
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}
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template <typename T>
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const T* GetPointerFromRaw(PAddr addr) const {
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return reinterpret_cast<T*>(buffer.BackingBasePointer() + addr);
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}
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Common::HostMemory buffer;
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};
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@ -0,0 +1,97 @@
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// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <deque>
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#include <memory>
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#include "common/common_types.h"
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#include "common/virtual_buffer.h"
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namespace Core {
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class DeviceMemory;
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namespace Memory {
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class Memory;
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}
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template <typename DTraits>
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struct DeviceMemoryManagerAllocator;
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template <typename Traits>
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class DeviceMemoryManager {
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using DeviceInterface = typename Traits::DeviceInterface;
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public:
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DeviceMemoryManager(const DeviceMemory& device_memory);
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~DeviceMemoryManager();
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void BindInterface(DeviceInterface* interface);
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DAddr Allocate(size_t size);
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void AllocateFixed(DAddr start, size_t size);
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DAddr AllocatePinned(size_t size);
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void Free(DAddr start, size_t size);
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void Map(DAddr address, VAddr virtual_address, size_t size, size_t p_id);
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void Unmap(DAddr address, size_t size);
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// Write / Read
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template <typename T>
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T* GetPointer(DAddr address);
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template <typename T>
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const T* GetPointer(DAddr address) const;
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template <typename T>
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void Write(DAddr address, T value);
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template <typename T>
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T Read(DAddr address) const;
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void ReadBlock(DAddr address, void* dest_pointer, size_t size);
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void WriteBlock(DAddr address, void* src_pointer, size_t size);
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size_t RegisterProcess(Memory::Memory* memory);
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void UnregisterProcess(size_t id);
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private:
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static constexpr bool supports_pinning = Traits::supports_pinning;
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static constexpr size_t device_virtual_bits = Traits::device_virtual_bits;
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static constexpr size_t device_as_size = 1ULL << device_virtual_bits;
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static constexpr size_t physical_max_bits = 33;
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static constexpr size_t page_bits = 12;
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static constexpr u32 physical_address_base = 1U << page_bits;
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template <typename T>
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T* GetPointerFromRaw(PAddr addr) {
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return reinterpret_cast<T*>(physical_base + addr);
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}
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template <typename T>
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const T* GetPointerFromRaw(PAddr addr) const {
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return reinterpret_cast<T*>(physical_base + addr);
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}
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template <typename T>
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PAddr GetRawPhysicalAddr(const T* ptr) const {
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return static_cast<PAddr>(reinterpret_cast<uintptr_t>(ptr) - physical_base);
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}
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void WalkBlock(const DAddr addr, const std::size_t size, auto on_unmapped, auto on_memory,
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auto increment);
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std::unique_ptr<DeviceMemoryManagerAllocator<Traits>> impl;
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const uintptr_t physical_base;
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DeviceInterface* interface;
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Common::VirtualBuffer<u32> compressed_physical_ptr;
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Common::VirtualBuffer<u32> compressed_device_addr;
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std::deque<size_t> id_pool;
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std::deque<Memory::Memory*> registered_processes;
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};
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} // namespace Core
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@ -0,0 +1,304 @@
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// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <atomic>
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#include <memory>
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#include <type_traits>
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#include "common/address_space.h"
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#include "common/address_space.inc"
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#include "common/alignment.h"
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#include "common/scope_exit.h"
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#include "core/device_memory.h"
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#include "core/device_memory_manager.h"
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#include "core/memory.h"
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namespace Core {
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struct EmptyAllocator {
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EmptyAllocator([[maybe_unused]] DAddr address) {}
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};
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template <typename DTraits>
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struct DeviceMemoryManagerAllocator {
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static constexpr bool supports_pinning = DTraits::supports_pinning;
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static constexpr size_t device_virtual_bits = DTraits::device_virtual_bits;
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static constexpr size_t pin_bits = 32;
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static constexpr DAddr first_address = 1ULL << Memory::YUZU_PAGEBITS;
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static constexpr DAddr max_pin_area = supports_pinning ? 1ULL << pin_bits : first_address;
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static constexpr DAddr max_device_area = 1ULL << device_virtual_bits;
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DeviceMemoryManagerAllocator()
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: pin_allocator(first_address),
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main_allocator(supports_pinning ? 1ULL << pin_bits : first_address) {}
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std::conditional_t<supports_pinning, Common::FlatAllocator<DAddr, 0, pin_bits>, EmptyAllocator>
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pin_allocator;
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Common::FlatAllocator<DAddr, 0, device_virtual_bits> main_allocator;
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/// Returns true when vaddr -> vaddr+size is fully contained in the buffer
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template <bool pin_area>
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[[nodiscard]] bool IsInBounds(VAddr addr, u64 size) const noexcept {
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if constexpr (pin_area) {
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return addr >= 0 && addr + size <= max_pin_area;
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} else {
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return addr >= max_pin_area && addr + size <= max_device_area;
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}
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}
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DAddr Allocate(size_t size) {
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return main_allocator.Allocate(size);
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}
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DAddr AllocatePinned(size_t size) {
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return pin_allocator.Allocate(size);
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}
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void DoInRange(DAddr address, size_t size, auto pin_func, auto main_func) {
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if (IsInBounds<true>(address, size)) {
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pin_func(address, size);
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return;
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}
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if (IsInBounds<false>(address, size)) {
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main_func(address, size);
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return;
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}
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DAddr end_size = address + size - max_pin_area;
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DAddr end_size2 = max_pin_area - address;
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pin_func(address, end_size2);
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main_func(max_pin_area, end_size);
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}
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void AllocateFixed(DAddr b_address, size_t b_size) {
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if constexpr (supports_pinning) {
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DoInRange(
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b_address, b_size,
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[this](DAddr address, size_t size) { pin_allocator.AllocateFixed(address, size); },
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[this](DAddr address, size_t size) {
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main_allocator.AllocateFixed(address, size);
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});
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} else {
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main_allocator.AllocateFixed(b_address, b_size);
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}
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}
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void Free(DAddr b_address, size_t b_size) {
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if constexpr (supports_pinning) {
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DoInRange(
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b_address, b_size,
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[this](DAddr address, size_t size) { pin_allocator.Free(address, size); },
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[this](DAddr address, size_t size) { main_allocator.Free(address, size); });
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} else {
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main_allocator.Free(b_address, b_size);
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}
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}
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};
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template <typename Traits>
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DeviceMemoryManager<Traits>::DeviceMemoryManager(const DeviceMemory& device_memory_)
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: physical_base{reinterpret_cast<const uintptr_t>(device_memory_.buffer.BackingBasePointer())},
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interface{nullptr}, compressed_physical_ptr(device_as_size >> Memory::YUZU_PAGEBITS),
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compressed_device_addr(1ULL << (physical_max_bits - Memory::YUZU_PAGEBITS)) {
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impl = std::make_unique<DeviceMemoryManagerAllocator<Traits>>();
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}
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template <typename Traits>
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DeviceMemoryManager<Traits>::~DeviceMemoryManager() = default;
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template <typename Traits>
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void DeviceMemoryManager<Traits>::BindInterface(DeviceInterface* interface_) {
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interface = interface_;
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}
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template <typename Traits>
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DAddr DeviceMemoryManager<Traits>::Allocate(size_t size) {
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return impl->Allocate(size);
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::AllocateFixed(DAddr start, size_t size) {
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return impl->AllocateFixed(start, size);
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}
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template <typename Traits>
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DAddr DeviceMemoryManager<Traits>::AllocatePinned(size_t size) {
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return impl->AllocatePinned(size);
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::Free(DAddr start, size_t size) {
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impl->Free(start, size);
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::Map(DAddr address, VAddr virtual_address, size_t size,
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size_t p_id) {
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Core::Memory::Memory* process_memory = registered_processes[p_id];
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size_t start_page_d = address >> Memory::YUZU_PAGEBITS;
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size_t num_pages = Common::AlignUp(size, Memory::YUZU_PAGESIZE) >> Memory::YUZU_PAGEBITS;
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std::atomic_thread_fence(std::memory_order_acquire);
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for (size_t i = 0; i < num_pages; i++) {
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auto* ptr = process_memory->GetPointer(
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Common::ProcessAddress(virtual_address + i * Memory::YUZU_PAGESIZE));
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if (ptr == nullptr) [[unlikely]] {
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compressed_physical_ptr[start_page_d + i] = 0;
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continue;
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}
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auto phys_addr = static_cast<u32>(GetRawPhysicalAddr(ptr) >> Memory::YUZU_PAGEBITS) + 1U;
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compressed_physical_ptr[start_page_d + i] = phys_addr;
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compressed_device_addr[phys_addr - 1U] = static_cast<u32>(start_page_d + i);
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}
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std::atomic_thread_fence(std::memory_order_release);
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::Unmap(DAddr address, size_t size) {
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size_t start_page_d = address >> Memory::YUZU_PAGEBITS;
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size_t num_pages = Common::AlignUp(size, Memory::YUZU_PAGESIZE) >> Memory::YUZU_PAGEBITS;
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std::atomic_thread_fence(std::memory_order_acquire);
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for (size_t i = 0; i < num_pages; i++) {
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auto phys_addr = compressed_physical_ptr[start_page_d + i];
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compressed_physical_ptr[start_page_d + i] = 0;
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if (phys_addr != 0) {
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compressed_device_addr[phys_addr - 1] = 0;
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}
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}
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std::atomic_thread_fence(std::memory_order_release);
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}
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template <typename Traits>
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template <typename T>
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T* DeviceMemoryManager<Traits>::GetPointer(DAddr address) {
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const size_t index = address >> Memory::YUZU_PAGEBITS;
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const size_t offset = address & Memory::YUZU_PAGEMASK;
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auto phys_addr = compressed_physical_ptr[index];
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if (phys_addr == 0) [[unlikely]] {
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return nullptr;
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}
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return GetPointerFromRaw<T>(
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static_cast<PAddr>(((phys_addr - 1) << Memory::YUZU_PAGEBITS) + offset));
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}
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template <typename Traits>
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template <typename T>
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const T* DeviceMemoryManager<Traits>::GetPointer(DAddr address) const {
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const size_t index = address >> Memory::YUZU_PAGEBITS;
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const size_t offset = address & Memory::YUZU_PAGEMASK;
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auto phys_addr = compressed_physical_ptr[index];
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if (phys_addr == 0) [[unlikely]] {
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return nullptr;
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}
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return GetPointerFromRaw<T>(
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static_cast<PAddr>(((phys_addr - 1) << Memory::YUZU_PAGEBITS) + offset));
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}
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template <typename Traits>
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template <typename T>
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void DeviceMemoryManager<Traits>::Write(DAddr address, T value) {
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T* ptr = GetPointer<T>(address);
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if (!ptr) [[unlikely]] {
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return;
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}
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std::memcpy(ptr, &value, sizeof(T));
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}
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template <typename Traits>
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template <typename T>
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T DeviceMemoryManager<Traits>::Read(DAddr address) const {
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const T* ptr = GetPointer<T>(address);
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T result{};
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if (!ptr) [[unlikely]] {
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return result;
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}
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std::memcpy(&result, ptr, sizeof(T));
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return result;
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::WalkBlock(DAddr addr, std::size_t size, auto on_unmapped,
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auto on_memory, auto increment) {
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std::size_t remaining_size = size;
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std::size_t page_index = addr >> Memory::YUZU_PAGEBITS;
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std::size_t page_offset = addr & Memory::YUZU_PAGEMASK;
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while (remaining_size) {
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const std::size_t copy_amount =
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std::min(static_cast<std::size_t>(Memory::YUZU_PAGESIZE) - page_offset, remaining_size);
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const auto current_vaddr =
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static_cast<u64>((page_index << Memory::YUZU_PAGEBITS) + page_offset);
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SCOPE_EXIT({
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page_index++;
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page_offset = 0;
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increment(copy_amount);
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remaining_size -= copy_amount;
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});
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auto phys_addr = compressed_physical_ptr[page_index];
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if (phys_addr == 0) {
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on_unmapped(copy_amount, current_vaddr);
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continue;
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}
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auto* mem_ptr = GetPointerFromRaw<u8>(
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static_cast<PAddr>(((phys_addr - 1) << Memory::YUZU_PAGEBITS) + page_offset));
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on_memory(copy_amount, mem_ptr);
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}
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::ReadBlock(DAddr address, void* dest_pointer, size_t size) {
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WalkBlock(
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address, size,
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[&](size_t copy_amount, DAddr current_vaddr) {
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LOG_ERROR(
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HW_Memory,
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"Unmapped Device ReadBlock @ 0x{:016X} (start address = 0x{:016X}, size = {})",
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current_vaddr, address, size);
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std::memset(dest_pointer, 0, copy_amount);
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},
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[&](size_t copy_amount, const u8* const src_ptr) {
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std::memcpy(dest_pointer, src_ptr, copy_amount);
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},
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[&](const std::size_t copy_amount) {
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dest_pointer = static_cast<u8*>(dest_pointer) + copy_amount;
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});
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::WriteBlock(DAddr address, void* src_pointer, size_t size) {
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WalkBlock(
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address, size,
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[&](size_t copy_amount, DAddr current_vaddr) {
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LOG_ERROR(
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HW_Memory,
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"Unmapped Device WriteBlock @ 0x{:016X} (start address = 0x{:016X}, size = {})",
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current_vaddr, address, size);
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},
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[&](size_t copy_amount, u8* const dst_ptr) {
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std::memcpy(dst_ptr, src_pointer, copy_amount);
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},
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[&](const std::size_t copy_amount) {
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src_pointer = static_cast<u8*>(src_pointer) + copy_amount;
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});
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}
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template <typename Traits>
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size_t DeviceMemoryManager<Traits>::RegisterProcess(Memory::Memory* memory_interface) {
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size_t new_id;
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if (!id_pool.empty()) {
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new_id = id_pool.front();
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id_pool.pop_front();
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registered_processes[new_id] = memory_interface;
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} else {
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registered_processes.emplace_back(memory_interface);
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new_id = registered_processes.size() - 1U;
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}
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return new_id;
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}
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template <typename Traits>
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void DeviceMemoryManager<Traits>::UnregisterProcess(size_t id) {
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registered_processes[id] = nullptr;
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id_pool.push_front(id);
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}
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} // namespace Core
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@ -0,0 +1,21 @@
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// SPDX-FileCopyrightText: 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "core/device_memory_manager.inc"
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#include "video_core/host1x/gpu_device_memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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template struct Core::DeviceMemoryManagerAllocator<Tegra::MaxwellDeviceTraits>;
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template class Core::DeviceMemoryManager<Tegra::MaxwellDeviceTraits>;
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template const u8* Tegra::MaxwellDeviceMemoryManager::GetPointer<u8>(DAddr addr) const;
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template u8* Tegra::MaxwellDeviceMemoryManager::GetPointer<u8>(DAddr addr);
|
||||
|
||||
template u8 Tegra::MaxwellDeviceMemoryManager::Read<u8>(DAddr addr) const;
|
||||
template u16 Tegra::MaxwellDeviceMemoryManager::Read<u16>(DAddr addr) const;
|
||||
template u32 Tegra::MaxwellDeviceMemoryManager::Read<u32>(DAddr addr) const;
|
||||
template u64 Tegra::MaxwellDeviceMemoryManager::Read<u64>(DAddr addr) const;
|
||||
template void Tegra::MaxwellDeviceMemoryManager::Write<u8>(DAddr addr, u8 data);
|
||||
template void Tegra::MaxwellDeviceMemoryManager::Write<u16>(DAddr addr, u16 data);
|
||||
template void Tegra::MaxwellDeviceMemoryManager::Write<u32>(DAddr addr, u32 data);
|
||||
template void Tegra::MaxwellDeviceMemoryManager::Write<u64>(DAddr addr, u64 data);
|
|
@ -0,0 +1,20 @@
|
|||
// SPDX-FileCopyrightText: 2023 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "core/device_memory_manager.h"
|
||||
|
||||
namespace VideoCore {
|
||||
class RasterizerInterface;
|
||||
}
|
||||
|
||||
namespace Tegra {
|
||||
|
||||
struct MaxwellDeviceTraits {
|
||||
static constexpr bool supports_pinning = true;
|
||||
static constexpr size_t device_virtual_bits = 34;
|
||||
using DeviceInterface = typename VideoCore::RasterizerInterface;
|
||||
};
|
||||
|
||||
using MaxwellDeviceMemoryManager = Core::DeviceMemoryManager<MaxwellDeviceTraits>;
|
||||
|
||||
} // namespace Tegra
|
Reference in New Issue