yuzu-emu
/
yuzu
Archived
1
0
Fork 0

gl_shader_decompiler: Refactor uniform handling to allow different decodings.

This commit is contained in:
bunnei 2018-06-05 22:45:22 -04:00
parent be09dfeed9
commit 6e386a334b
2 changed files with 29 additions and 26 deletions

View File

@ -109,11 +109,6 @@ union Sampler {
u64 value{}; u64 value{};
}; };
union Uniform {
BitField<20, 14, u64> offset;
BitField<34, 5, u64> index;
};
} // namespace Shader } // namespace Shader
} // namespace Tegra } // namespace Tegra
@ -354,12 +349,21 @@ union Instruction {
} }
} bra; } bra;
union {
BitField<20, 14, u64> offset;
BitField<34, 5, u64> index;
} cbuf34;
union {
BitField<20, 16, s64> offset;
BitField<36, 5, u64> index;
} cbuf36;
BitField<61, 1, u64> is_b_imm; BitField<61, 1, u64> is_b_imm;
BitField<60, 1, u64> is_b_gpr; BitField<60, 1, u64> is_b_gpr;
BitField<59, 1, u64> is_c_gpr; BitField<59, 1, u64> is_c_gpr;
Attribute attribute; Attribute attribute;
Uniform uniform;
Sampler sampler; Sampler sampler;
u64 value; u64 value;

View File

@ -20,7 +20,6 @@ using Tegra::Shader::OpCode;
using Tegra::Shader::Register; using Tegra::Shader::Register;
using Tegra::Shader::Sampler; using Tegra::Shader::Sampler;
using Tegra::Shader::SubOp; using Tegra::Shader::SubOp;
using Tegra::Shader::Uniform;
constexpr u32 PROGRAM_END = MAX_PROGRAM_CODE_LENGTH; constexpr u32 PROGRAM_END = MAX_PROGRAM_CODE_LENGTH;
@ -365,11 +364,9 @@ public:
} }
/// Generates code representing a uniform (C buffer) register, interpreted as the input type. /// Generates code representing a uniform (C buffer) register, interpreted as the input type.
std::string GetUniform(const Uniform& uniform, GLSLRegister::Type type) { std::string GetUniform(u64 index, u64 offset, GLSLRegister::Type type) {
declr_const_buffers[uniform.index].MarkAsUsed(static_cast<unsigned>(uniform.index), declr_const_buffers[index].MarkAsUsed(index, offset, stage);
static_cast<unsigned>(uniform.offset), stage); std::string value = 'c' + std::to_string(index) + '[' + std::to_string(offset) + ']';
std::string value =
'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']';
if (type == GLSLRegister::Type::Float) { if (type == GLSLRegister::Type::Float) {
return value; return value;
@ -380,12 +377,6 @@ public:
} }
} }
/// Generates code representing a uniform (C buffer) register, interpreted as the type of the
/// destination register.
std::string GetUniform(const Uniform& uniform, const Register& dest_reg) {
return GetUniform(uniform, regs[dest_reg].GetActiveType());
}
/// Add declarations for registers /// Add declarations for registers
void GenerateDeclarations() { void GenerateDeclarations() {
for (const auto& reg : regs) { for (const auto& reg : regs) {
@ -747,7 +738,8 @@ private:
if (instr.is_b_gpr) { if (instr.is_b_gpr) {
op_b += regs.GetRegisterAsFloat(instr.gpr20); op_b += regs.GetRegisterAsFloat(instr.gpr20);
} else { } else {
op_b += regs.GetUniform(instr.uniform, instr.gpr0); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Float);
} }
} }
@ -904,7 +896,8 @@ private:
if (instr.is_b_gpr) { if (instr.is_b_gpr) {
op_b += regs.GetRegisterAsInteger(instr.gpr20); op_b += regs.GetRegisterAsInteger(instr.gpr20);
} else { } else {
op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Integer);
} }
} }
@ -936,7 +929,8 @@ private:
if (instr.is_b_gpr) { if (instr.is_b_gpr) {
op_b += regs.GetRegisterAsInteger(instr.gpr20); op_b += regs.GetRegisterAsInteger(instr.gpr20);
} else { } else {
op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Integer);
} }
} }
@ -953,7 +947,8 @@ private:
switch (opcode->GetId()) { switch (opcode->GetId()) {
case OpCode::Id::FFMA_CR: { case OpCode::Id::FFMA_CR: {
op_b += regs.GetUniform(instr.uniform, instr.gpr0); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Float);
op_c += regs.GetRegisterAsFloat(instr.gpr39); op_c += regs.GetRegisterAsFloat(instr.gpr39);
break; break;
} }
@ -964,7 +959,8 @@ private:
} }
case OpCode::Id::FFMA_RC: { case OpCode::Id::FFMA_RC: {
op_b += regs.GetRegisterAsFloat(instr.gpr39); op_b += regs.GetRegisterAsFloat(instr.gpr39);
op_c += regs.GetUniform(instr.uniform, instr.gpr0); op_c += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Float);
break; break;
} }
case OpCode::Id::FFMA_IMM: { case OpCode::Id::FFMA_IMM: {
@ -1175,7 +1171,8 @@ private:
if (instr.is_b_gpr) { if (instr.is_b_gpr) {
op_b += regs.GetRegisterAsFloat(instr.gpr20); op_b += regs.GetRegisterAsFloat(instr.gpr20);
} else { } else {
op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Float);
} }
} }
@ -1216,7 +1213,8 @@ private:
if (instr.is_b_gpr) { if (instr.is_b_gpr) {
op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed);
} else { } else {
op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Integer);
} }
using Tegra::Shader::Pred; using Tegra::Shader::Pred;
@ -1262,7 +1260,8 @@ private:
if (instr.is_b_gpr) { if (instr.is_b_gpr) {
op_b += regs.GetRegisterAsFloat(instr.gpr20); op_b += regs.GetRegisterAsFloat(instr.gpr20);
} else { } else {
op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float); op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
GLSLRegister::Type::Float);
} }
} }