yuzu-emu
/
yuzu
Archived
1
0
Fork 0
Code

Merge pull request #564 from bunnei/lop32i_passb 

gl_shader_decompiler: Implement LOP32I LogicOperation PassB.
This commit is contained in:
bunnei 2018-06-15 22:04:03 -04:00 committed by GitHub
parent 46cbb6b090 61f9d9c4ab
commit fb5bd0920d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 12 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/video_core/renderer_opengl/gl_shader_decompiler.cpp
View File

@ -930,20 +930,26 @@ private:
if (instr.alu.lop.invert_b)
imm = ~imm;
std::string op_b = std::to_string(imm);
switch (instr.alu.lop.operation) {
case Tegra::Shader::LogicOperation::And: {
regs.SetRegisterToInteger(instr.gpr0, true, 0,
'(' + op_a + " & " + std::to_string(imm) + ')', 1, 1);
regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " & " + op_b + ')',
1, 1);
break;
}
case Tegra::Shader::LogicOperation::Or: {
regs.SetRegisterToInteger(instr.gpr0, true, 0,
'(' + op_a + " | " + std::to_string(imm) + ')', 1, 1);
regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " | " + op_b + ')',
1, 1);
break;
}
case Tegra::Shader::LogicOperation::Xor: {
regs.SetRegisterToInteger(instr.gpr0, true, 0,
'(' + op_a + " ^ " + std::to_string(imm) + ')', 1, 1);
regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " ^ " + op_b + ')',
1, 1);
break;
}
case Tegra::Shader::LogicOperation::PassB: {
regs.SetRegisterToInteger(instr.gpr0, true, 0, op_b, 1, 1);
break;
}
default: