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ThreadContext: Move from "core" to "arm_interface".

This commit is contained in:
bunnei 2016-12-22 00:08:09 -05:00
parent e26fbfd1d7
commit 8b1e269e58
8 changed files with 26 additions and 37 deletions

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@ -8,15 +8,22 @@
#include "core/arm/skyeye_common/arm_regformat.h" #include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/vfp/asm_vfp.h" #include "core/arm/skyeye_common/vfp/asm_vfp.h"
namespace Core {
struct ThreadContext;
}
/// Generic ARM11 CPU interface /// Generic ARM11 CPU interface
class ARM_Interface : NonCopyable { class ARM_Interface : NonCopyable {
public: public:
virtual ~ARM_Interface() {} virtual ~ARM_Interface() {}
struct ThreadContext {
u32 cpu_registers[13];
u32 sp;
u32 lr;
u32 pc;
u32 cpsr;
u32 fpu_registers[64];
u32 fpscr;
u32 fpexc;
};
/** /**
* Runs the CPU for the given number of instructions * Runs the CPU for the given number of instructions
* @param num_instructions Number of instructions to run * @param num_instructions Number of instructions to run
@ -124,13 +131,13 @@ public:
* Saves the current CPU context * Saves the current CPU context
* @param ctx Thread context to save * @param ctx Thread context to save
*/ */
virtual void SaveContext(Core::ThreadContext& ctx) = 0; virtual void SaveContext(ThreadContext& ctx) = 0;
/** /**
* Loads a CPU context * Loads a CPU context
* @param ctx Thread context to load * @param ctx Thread context to load
*/ */
virtual void LoadContext(const Core::ThreadContext& ctx) = 0; virtual void LoadContext(const ThreadContext& ctx) = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state) /// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0; virtual void PrepareReschedule() = 0;

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@ -137,7 +137,7 @@ void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
AddTicks(ticks_executed); AddTicks(ticks_executed);
} }
void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) { void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers)); memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers)); memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
@ -150,7 +150,7 @@ void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) {
ctx.fpexc = interpreter_state->VFP[VFP_FPEXC]; ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
} }
void ARM_Dynarmic::LoadContext(const Core::ThreadContext& ctx) { void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));

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@ -10,10 +10,6 @@
#include "core/arm/arm_interface.h" #include "core/arm/arm_interface.h"
#include "core/arm/skyeye_common/armstate.h" #include "core/arm/skyeye_common/armstate.h"
namespace Core {
struct ThreadContext;
}
class ARM_Dynarmic final : public ARM_Interface { class ARM_Dynarmic final : public ARM_Interface {
public: public:
ARM_Dynarmic(PrivilegeMode initial_mode); ARM_Dynarmic(PrivilegeMode initial_mode);
@ -33,8 +29,8 @@ public:
void AddTicks(u64 ticks) override; void AddTicks(u64 ticks) override;
void SaveContext(Core::ThreadContext& ctx) override; void SaveContext(ThreadContext& ctx) override;
void LoadContext(const Core::ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override;
void PrepareReschedule() override; void PrepareReschedule() override;
void ExecuteInstructions(int num_instructions) override; void ExecuteInstructions(int num_instructions) override;

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@ -89,7 +89,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
AddTicks(ticks_executed); AddTicks(ticks_executed);
} }
void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { void ARM_DynCom::SaveContext(ThreadContext& ctx) {
memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers)); memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers));
memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers)); memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers));
@ -102,7 +102,7 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
ctx.fpexc = state->VFP[VFP_FPEXC]; ctx.fpexc = state->VFP[VFP_FPEXC];
} }
void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));

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@ -10,10 +10,6 @@
#include "core/arm/skyeye_common/arm_regformat.h" #include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/armstate.h" #include "core/arm/skyeye_common/armstate.h"
namespace Core {
struct ThreadContext;
}
class ARM_DynCom final : public ARM_Interface { class ARM_DynCom final : public ARM_Interface {
public: public:
ARM_DynCom(PrivilegeMode initial_mode); ARM_DynCom(PrivilegeMode initial_mode);
@ -36,8 +32,8 @@ public:
void AddTicks(u64 ticks) override; void AddTicks(u64 ticks) override;
void SaveContext(Core::ThreadContext& ctx) override; void SaveContext(ThreadContext& ctx) override;
void LoadContext(const Core::ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override;
void PrepareReschedule() override; void PrepareReschedule() override;
void ExecuteInstructions(int num_instructions) override; void ExecuteInstructions(int num_instructions) override;

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@ -19,17 +19,6 @@ class AppLoader;
namespace Core { namespace Core {
struct ThreadContext {
u32 cpu_registers[13];
u32 sp;
u32 lr;
u32 pc;
u32 cpsr;
u32 fpu_registers[64];
u32 fpscr;
u32 fpexc;
};
class System { class System {
public: public:
/** /**

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@ -384,9 +384,9 @@ std::tuple<u32, u32, bool> GetFreeThreadLocalSlot(std::vector<std::bitset<8>>& t
* @param entry_point Address of entry point for execution * @param entry_point Address of entry point for execution
* @param arg User argument for thread * @param arg User argument for thread
*/ */
static void ResetThreadContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, static void ResetThreadContext(ARM_Interface::ThreadContext& context, u32 stack_top,
u32 arg) { u32 entry_point, u32 arg) {
memset(&context, 0, sizeof(Core::ThreadContext)); memset(&context, 0, sizeof(ARM_Interface::ThreadContext));
context.cpu_registers[0] = arg; context.cpu_registers[0] = arg;
context.pc = entry_point; context.pc = entry_point;

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@ -10,6 +10,7 @@
#include <boost/container/flat_map.hpp> #include <boost/container/flat_map.hpp>
#include <boost/container/flat_set.hpp> #include <boost/container/flat_set.hpp>
#include "common/common_types.h" #include "common/common_types.h"
#include "core/arm/arm_interface.h"
#include "core/core.h" #include "core/core.h"
#include "core/hle/kernel/kernel.h" #include "core/hle/kernel/kernel.h"
#include "core/hle/result.h" #include "core/hle/result.h"
@ -157,7 +158,7 @@ public:
return !wait_objects.empty(); return !wait_objects.empty();
} }
Core::ThreadContext context; ARM_Interface::ThreadContext context;
u32 thread_id; u32 thread_id;