arm_dynarmic: Remove dependence on interpreter
This commit is contained in:
parent
e04590a06d
commit
8b7b6e9f74
|
@ -103,8 +103,6 @@ void RegistersWidget::OnEmulationStopping() {
|
||||||
|
|
||||||
vfp_system_registers->child(0)->setText(1, QString{});
|
vfp_system_registers->child(0)->setText(1, QString{});
|
||||||
vfp_system_registers->child(1)->setText(1, QString{});
|
vfp_system_registers->child(1)->setText(1, QString{});
|
||||||
vfp_system_registers->child(2)->setText(1, QString{});
|
|
||||||
vfp_system_registers->child(3)->setText(1, QString{});
|
|
||||||
|
|
||||||
setEnabled(false);
|
setEnabled(false);
|
||||||
}
|
}
|
||||||
|
@ -188,16 +186,12 @@ void RegistersWidget::CreateVFPSystemRegisterChildren() {
|
||||||
|
|
||||||
vfp_system_registers->addChild(fpscr);
|
vfp_system_registers->addChild(fpscr);
|
||||||
vfp_system_registers->addChild(fpexc);
|
vfp_system_registers->addChild(fpexc);
|
||||||
vfp_system_registers->addChild(new QTreeWidgetItem(QStringList(QStringLiteral("FPINST"))));
|
|
||||||
vfp_system_registers->addChild(new QTreeWidgetItem(QStringList(QStringLiteral("FPINST2"))));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void RegistersWidget::UpdateVFPSystemRegisterValues() {
|
void RegistersWidget::UpdateVFPSystemRegisterValues() {
|
||||||
// Todo: handle all cores
|
// Todo: handle all cores
|
||||||
const u32 fpscr_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPSCR);
|
const u32 fpscr_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPSCR);
|
||||||
const u32 fpexc_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPEXC);
|
const u32 fpexc_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPEXC);
|
||||||
const u32 fpinst_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPINST);
|
|
||||||
const u32 fpinst2_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPINST2);
|
|
||||||
|
|
||||||
QTreeWidgetItem* const fpscr = vfp_system_registers->child(0);
|
QTreeWidgetItem* const fpscr = vfp_system_registers->child(0);
|
||||||
fpscr->setText(1, QStringLiteral("0x%1").arg(fpscr_val, 8, 16, QLatin1Char('0')));
|
fpscr->setText(1, QStringLiteral("0x%1").arg(fpscr_val, 8, 16, QLatin1Char('0')));
|
||||||
|
@ -237,9 +231,4 @@ void RegistersWidget::UpdateVFPSystemRegisterValues() {
|
||||||
fpexc->child(5)->setText(1, QString::number((fpexc_val >> 28) & 1));
|
fpexc->child(5)->setText(1, QString::number((fpexc_val >> 28) & 1));
|
||||||
fpexc->child(6)->setText(1, QString::number((fpexc_val >> 30) & 1));
|
fpexc->child(6)->setText(1, QString::number((fpexc_val >> 30) & 1));
|
||||||
fpexc->child(7)->setText(1, QString::number((fpexc_val >> 31) & 1));
|
fpexc->child(7)->setText(1, QString::number((fpexc_val >> 31) & 1));
|
||||||
|
|
||||||
vfp_system_registers->child(2)->setText(
|
|
||||||
1, QStringLiteral("0x%1").arg(fpinst_val, 8, 16, QLatin1Char('0')));
|
|
||||||
vfp_system_registers->child(3)->setText(
|
|
||||||
1, QStringLiteral("0x%1").arg(fpinst2_val, 8, 16, QLatin1Char('0')));
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -9,7 +9,6 @@
|
||||||
#include "common/microprofile.h"
|
#include "common/microprofile.h"
|
||||||
#include "core/arm/dynarmic/arm_dynarmic.h"
|
#include "core/arm/dynarmic/arm_dynarmic.h"
|
||||||
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
|
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
|
||||||
#include "core/arm/dyncom/arm_dyncom_interpreter.h"
|
|
||||||
#include "core/core.h"
|
#include "core/core.h"
|
||||||
#include "core/core_timing.h"
|
#include "core/core_timing.h"
|
||||||
#include "core/gdbstub/gdbstub.h"
|
#include "core/gdbstub/gdbstub.h"
|
||||||
|
@ -102,24 +101,9 @@ public:
|
||||||
}
|
}
|
||||||
|
|
||||||
void InterpreterFallback(VAddr pc, std::size_t num_instructions) override {
|
void InterpreterFallback(VAddr pc, std::size_t num_instructions) override {
|
||||||
parent.interpreter_state->Reg = parent.jit->Regs();
|
// Should never happen.
|
||||||
parent.interpreter_state->Cpsr = parent.jit->Cpsr();
|
UNREACHABLE_MSG("InterpeterFallback reached with pc = 0x{:08x}, code = 0x{:08x}, num = {}",
|
||||||
parent.interpreter_state->Reg[15] = pc;
|
pc, MemoryReadCode(pc), num_instructions);
|
||||||
parent.interpreter_state->ExtReg = parent.jit->ExtRegs();
|
|
||||||
parent.interpreter_state->VFP[VFP_FPSCR] = parent.jit->Fpscr();
|
|
||||||
parent.interpreter_state->NumInstrsToExecute = num_instructions;
|
|
||||||
|
|
||||||
InterpreterMainLoop(parent.interpreter_state.get());
|
|
||||||
|
|
||||||
bool is_thumb = (parent.interpreter_state->Cpsr & (1 << 5)) != 0;
|
|
||||||
parent.interpreter_state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
|
|
||||||
|
|
||||||
parent.jit->Regs() = parent.interpreter_state->Reg;
|
|
||||||
parent.jit->SetCpsr(parent.interpreter_state->Cpsr);
|
|
||||||
parent.jit->ExtRegs() = parent.interpreter_state->ExtReg;
|
|
||||||
parent.jit->SetFpscr(parent.interpreter_state->VFP[VFP_FPSCR]);
|
|
||||||
|
|
||||||
parent.interpreter_state->ServeBreak();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void CallSVC(std::uint32_t swi) override {
|
void CallSVC(std::uint32_t swi) override {
|
||||||
|
@ -135,11 +119,7 @@ public:
|
||||||
if (GDBStub::IsConnected()) {
|
if (GDBStub::IsConnected()) {
|
||||||
parent.jit->HaltExecution();
|
parent.jit->HaltExecution();
|
||||||
parent.SetPC(pc);
|
parent.SetPC(pc);
|
||||||
Kernel::Thread* thread =
|
parent.ServeBreak();
|
||||||
parent.system.Kernel().GetCurrentThreadManager().GetCurrentThread();
|
|
||||||
parent.SaveContext(thread->context);
|
|
||||||
GDBStub::Break();
|
|
||||||
GDBStub::SendTrap(thread, 5);
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -169,12 +149,10 @@ public:
|
||||||
Memory::MemorySystem& memory;
|
Memory::MemorySystem& memory;
|
||||||
};
|
};
|
||||||
|
|
||||||
ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory,
|
ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, u32 id,
|
||||||
PrivilegeMode initial_mode, u32 id,
|
|
||||||
std::shared_ptr<Core::Timing::Timer> timer)
|
std::shared_ptr<Core::Timing::Timer> timer)
|
||||||
: ARM_Interface(id, timer), system(*system), memory(memory),
|
: ARM_Interface(id, timer), system(*system), memory(memory),
|
||||||
cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
|
cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
|
||||||
interpreter_state = std::make_shared<ARMul_State>(system, memory, initial_mode);
|
|
||||||
PageTableChanged();
|
PageTableChanged();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -190,7 +168,11 @@ void ARM_Dynarmic::Run() {
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::Step() {
|
void ARM_Dynarmic::Step() {
|
||||||
cb->InterpreterFallback(jit->Regs()[15], 1);
|
jit->Step();
|
||||||
|
|
||||||
|
if (GDBStub::IsConnected()) {
|
||||||
|
ServeBreak();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::SetPC(u32 pc) {
|
void ARM_Dynarmic::SetPC(u32 pc) {
|
||||||
|
@ -218,21 +200,25 @@ void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
|
u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
|
||||||
if (reg == VFP_FPSCR) {
|
switch (reg) {
|
||||||
|
case VFP_FPSCR:
|
||||||
return jit->Fpscr();
|
return jit->Fpscr();
|
||||||
|
case VFP_FPEXC:
|
||||||
|
return fpexc;
|
||||||
}
|
}
|
||||||
|
UNREACHABLE_MSG("Unknown VFP system register: {}", static_cast<size_t>(reg));
|
||||||
// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
|
|
||||||
return interpreter_state->VFP[reg];
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
|
void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
|
||||||
if (reg == VFP_FPSCR) {
|
switch (reg) {
|
||||||
|
case VFP_FPSCR:
|
||||||
jit->SetFpscr(value);
|
jit->SetFpscr(value);
|
||||||
|
return;
|
||||||
|
case VFP_FPEXC:
|
||||||
|
fpexc = value;
|
||||||
|
return;
|
||||||
}
|
}
|
||||||
|
UNREACHABLE_MSG("Unknown VFP system register: {}", static_cast<size_t>(reg));
|
||||||
// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
|
|
||||||
interpreter_state->VFP[reg] = value;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 ARM_Dynarmic::GetCPSR() const {
|
u32 ARM_Dynarmic::GetCPSR() const {
|
||||||
|
@ -244,11 +230,25 @@ void ARM_Dynarmic::SetCPSR(u32 cpsr) {
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
|
u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
|
||||||
return interpreter_state->CP15[reg];
|
switch (reg) {
|
||||||
|
case CP15_THREAD_UPRW:
|
||||||
|
return cp15_state.cp15_thread_uprw;
|
||||||
|
case CP15_THREAD_URO:
|
||||||
|
return cp15_state.cp15_thread_uro;
|
||||||
|
}
|
||||||
|
UNREACHABLE_MSG("Unknown CP15 register: {}", static_cast<size_t>(reg));
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
|
void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
|
||||||
interpreter_state->CP15[reg] = value;
|
switch (reg) {
|
||||||
|
case CP15_THREAD_UPRW:
|
||||||
|
cp15_state.cp15_thread_uprw = value;
|
||||||
|
return;
|
||||||
|
case CP15_THREAD_URO:
|
||||||
|
cp15_state.cp15_thread_uro = value;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
UNREACHABLE_MSG("Unknown CP15 register: {}", static_cast<size_t>(reg));
|
||||||
}
|
}
|
||||||
|
|
||||||
std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
|
std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
|
||||||
|
@ -260,7 +260,7 @@ void ARM_Dynarmic::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
|
||||||
ASSERT(ctx);
|
ASSERT(ctx);
|
||||||
|
|
||||||
jit->SaveContext(ctx->ctx);
|
jit->SaveContext(ctx->ctx);
|
||||||
ctx->fpexc = interpreter_state->VFP[VFP_FPEXC];
|
ctx->fpexc = fpexc;
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
|
void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
|
||||||
|
@ -268,7 +268,7 @@ void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
|
||||||
ASSERT(ctx);
|
ASSERT(ctx);
|
||||||
|
|
||||||
jit->LoadContext(ctx->ctx);
|
jit->LoadContext(ctx->ctx);
|
||||||
interpreter_state->VFP[VFP_FPEXC] = ctx->fpexc;
|
fpexc = ctx->fpexc;
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::PrepareReschedule() {
|
void ARM_Dynarmic::PrepareReschedule() {
|
||||||
|
@ -278,11 +278,9 @@ void ARM_Dynarmic::PrepareReschedule() {
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::ClearInstructionCache() {
|
void ARM_Dynarmic::ClearInstructionCache() {
|
||||||
// TODO: Clear interpreter cache when appropriate.
|
|
||||||
for (const auto& j : jits) {
|
for (const auto& j : jits) {
|
||||||
j.second->ClearCache();
|
j.second->ClearCache();
|
||||||
}
|
}
|
||||||
interpreter_state->instruction_cache.clear();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, std::size_t length) {
|
void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, std::size_t length) {
|
||||||
|
@ -303,11 +301,18 @@ void ARM_Dynarmic::PageTableChanged() {
|
||||||
jits.emplace(current_page_table, std::move(new_jit));
|
jits.emplace(current_page_table, std::move(new_jit));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void ARM_Dynarmic::ServeBreak() {
|
||||||
|
Kernel::Thread* thread = system.Kernel().GetCurrentThreadManager().GetCurrentThread();
|
||||||
|
SaveContext(thread->context);
|
||||||
|
GDBStub::Break();
|
||||||
|
GDBStub::SendTrap(thread, 5);
|
||||||
|
}
|
||||||
|
|
||||||
std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
|
std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
|
||||||
Dynarmic::A32::UserConfig config;
|
Dynarmic::A32::UserConfig config;
|
||||||
config.callbacks = cb.get();
|
config.callbacks = cb.get();
|
||||||
config.page_table = ¤t_page_table->pointers;
|
config.page_table = ¤t_page_table->pointers;
|
||||||
config.coprocessors[15] = std::make_shared<DynarmicCP15>(interpreter_state);
|
config.coprocessors[15] = std::make_shared<DynarmicCP15>(cp15_state);
|
||||||
config.define_unpredictable_behaviour = true;
|
config.define_unpredictable_behaviour = true;
|
||||||
return std::make_unique<Dynarmic::A32::Jit>(config);
|
return std::make_unique<Dynarmic::A32::Jit>(config);
|
||||||
}
|
}
|
||||||
|
|
|
@ -9,7 +9,7 @@
|
||||||
#include <dynarmic/A32/a32.h>
|
#include <dynarmic/A32/a32.h>
|
||||||
#include "common/common_types.h"
|
#include "common/common_types.h"
|
||||||
#include "core/arm/arm_interface.h"
|
#include "core/arm/arm_interface.h"
|
||||||
#include "core/arm/skyeye_common/armstate.h"
|
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
|
||||||
|
|
||||||
namespace Memory {
|
namespace Memory {
|
||||||
struct PageTable;
|
struct PageTable;
|
||||||
|
@ -24,8 +24,8 @@ class DynarmicUserCallbacks;
|
||||||
|
|
||||||
class ARM_Dynarmic final : public ARM_Interface {
|
class ARM_Dynarmic final : public ARM_Interface {
|
||||||
public:
|
public:
|
||||||
ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, PrivilegeMode initial_mode,
|
ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, u32 id,
|
||||||
u32 id, std::shared_ptr<Core::Timing::Timer> timer);
|
std::shared_ptr<Core::Timing::Timer> timer);
|
||||||
~ARM_Dynarmic() override;
|
~ARM_Dynarmic() override;
|
||||||
|
|
||||||
void Run() override;
|
void Run() override;
|
||||||
|
@ -55,14 +55,18 @@ public:
|
||||||
void PageTableChanged() override;
|
void PageTableChanged() override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
void ServeBreak();
|
||||||
|
|
||||||
friend class DynarmicUserCallbacks;
|
friend class DynarmicUserCallbacks;
|
||||||
Core::System& system;
|
Core::System& system;
|
||||||
Memory::MemorySystem& memory;
|
Memory::MemorySystem& memory;
|
||||||
std::unique_ptr<DynarmicUserCallbacks> cb;
|
std::unique_ptr<DynarmicUserCallbacks> cb;
|
||||||
std::unique_ptr<Dynarmic::A32::Jit> MakeJit();
|
std::unique_ptr<Dynarmic::A32::Jit> MakeJit();
|
||||||
|
|
||||||
|
u32 fpexc = 0;
|
||||||
|
CP15State cp15_state;
|
||||||
|
|
||||||
Dynarmic::A32::Jit* jit = nullptr;
|
Dynarmic::A32::Jit* jit = nullptr;
|
||||||
Memory::PageTable* current_page_table = nullptr;
|
Memory::PageTable* current_page_table = nullptr;
|
||||||
std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::A32::Jit>> jits;
|
std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::A32::Jit>> jits;
|
||||||
std::shared_ptr<ARMul_State> interpreter_state;
|
|
||||||
};
|
};
|
||||||
|
|
|
@ -10,7 +10,7 @@ using Callback = Dynarmic::A32::Coprocessor::Callback;
|
||||||
using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
|
using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
|
||||||
using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
|
using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
|
||||||
|
|
||||||
DynarmicCP15::DynarmicCP15(const std::shared_ptr<ARMul_State>& state) : interpreter_state(state) {}
|
DynarmicCP15::DynarmicCP15(CP15State& state) : state(state) {}
|
||||||
|
|
||||||
DynarmicCP15::~DynarmicCP15() = default;
|
DynarmicCP15::~DynarmicCP15() = default;
|
||||||
|
|
||||||
|
@ -26,24 +26,24 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1
|
||||||
|
|
||||||
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C5 && opc2 == 4) {
|
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C5 && opc2 == 4) {
|
||||||
// This is a dummy write, we ignore the value written here.
|
// This is a dummy write, we ignore the value written here.
|
||||||
return &interpreter_state->CP15[CP15_FLUSH_PREFETCH_BUFFER];
|
return &state.cp15_flush_prefetch_buffer;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C10) {
|
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C10) {
|
||||||
switch (opc2) {
|
switch (opc2) {
|
||||||
case 4:
|
case 4:
|
||||||
// This is a dummy write, we ignore the value written here.
|
// This is a dummy write, we ignore the value written here.
|
||||||
return &interpreter_state->CP15[CP15_DATA_SYNC_BARRIER];
|
return &state.cp15_data_sync_barrier;
|
||||||
case 5:
|
case 5:
|
||||||
// This is a dummy write, we ignore the value written here.
|
// This is a dummy write, we ignore the value written here.
|
||||||
return &interpreter_state->CP15[CP15_DATA_MEMORY_BARRIER];
|
return &state.cp15_data_memory_barrier;
|
||||||
default:
|
default:
|
||||||
return std::monostate{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0 && opc2 == 2) {
|
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0 && opc2 == 2) {
|
||||||
return &interpreter_state->CP15[CP15_THREAD_UPRW];
|
return &state.cp15_thread_uprw;
|
||||||
}
|
}
|
||||||
|
|
||||||
return std::monostate{};
|
return std::monostate{};
|
||||||
|
@ -60,9 +60,9 @@ CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1,
|
||||||
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0) {
|
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0) {
|
||||||
switch (opc2) {
|
switch (opc2) {
|
||||||
case 2:
|
case 2:
|
||||||
return &interpreter_state->CP15[CP15_THREAD_UPRW];
|
return &state.cp15_thread_uprw;
|
||||||
case 3:
|
case 3:
|
||||||
return &interpreter_state->CP15[CP15_THREAD_URO];
|
return &state.cp15_thread_uro;
|
||||||
default:
|
default:
|
||||||
return std::monostate{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
|
|
|
@ -8,13 +8,19 @@
|
||||||
#include <dynarmic/A32/coprocessor.h>
|
#include <dynarmic/A32/coprocessor.h>
|
||||||
#include "common/common_types.h"
|
#include "common/common_types.h"
|
||||||
|
|
||||||
struct ARMul_State;
|
struct CP15State {
|
||||||
|
u32 cp15_thread_uprw = 0;
|
||||||
|
u32 cp15_thread_uro = 0;
|
||||||
|
u32 cp15_flush_prefetch_buffer = 0; ///< dummy value
|
||||||
|
u32 cp15_data_sync_barrier = 0; ///< dummy value
|
||||||
|
u32 cp15_data_memory_barrier = 0; ///< dummy value
|
||||||
|
};
|
||||||
|
|
||||||
class DynarmicCP15 final : public Dynarmic::A32::Coprocessor {
|
class DynarmicCP15 final : public Dynarmic::A32::Coprocessor {
|
||||||
public:
|
public:
|
||||||
using CoprocReg = Dynarmic::A32::CoprocReg;
|
using CoprocReg = Dynarmic::A32::CoprocReg;
|
||||||
|
|
||||||
explicit DynarmicCP15(const std::shared_ptr<ARMul_State>&);
|
explicit DynarmicCP15(CP15State&);
|
||||||
~DynarmicCP15() override;
|
~DynarmicCP15() override;
|
||||||
|
|
||||||
std::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
|
std::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
|
||||||
|
@ -32,5 +38,5 @@ public:
|
||||||
std::optional<u8> option) override;
|
std::optional<u8> option) override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
std::shared_ptr<ARMul_State> interpreter_state;
|
CP15State& state;
|
||||||
};
|
};
|
||||||
|
|
|
@ -267,7 +267,7 @@ System::ResultStatus System::Init(Frontend::EmuWindow& emu_window, u32 system_mo
|
||||||
#ifdef ARCHITECTURE_x86_64
|
#ifdef ARCHITECTURE_x86_64
|
||||||
for (std::size_t i = 0; i < num_cores; ++i) {
|
for (std::size_t i = 0; i < num_cores; ++i) {
|
||||||
cpu_cores.push_back(
|
cpu_cores.push_back(
|
||||||
std::make_shared<ARM_Dynarmic>(this, *memory, USER32MODE, i, timing->GetTimer(i)));
|
std::make_shared<ARM_Dynarmic>(this, *memory, i, timing->GetTimer(i)));
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
for (std::size_t i = 0; i < num_cores; ++i) {
|
for (std::size_t i = 0; i < num_cores; ++i) {
|
||||||
|
|
Reference in New Issue