added mem_map hardware writing
This commit is contained in:
ShizZy
parent
030c836793
commit
bf3938d56e
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@ -75,27 +75,6 @@ static MemoryView g_views[] =
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static const int kNumMemViews = sizeof(g_views) / sizeof(MemoryView); ///< Number of mem views
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u8 Read8(const u32 addr) {
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return 0xDE;
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}
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u16 Read16(const u32 addr) {
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return 0xDEAD;
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}
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u32 Read32(const u32 addr) {
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return 0xDEADBEEF;
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}
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void Write8(const u32 addr, const u32 data) {
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}
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void Write16(const u32 addr, const u32 data) {
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}
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void Write32(const u32 addr, const u32 data) {
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}
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void Init() {
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int flags = 0;
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@ -104,7 +83,7 @@ void Init() {
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g_views[i].size = MEM_FCRAM_SIZE;
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}
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INFO_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram,
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NOTICE_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram,
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g_physical_fcram);
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}
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@ -113,7 +92,7 @@ void Shutdown() {
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MemoryMap_Shutdown(g_views, kNumMemViews, flags, &g_arena);
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g_arena.ReleaseSpace();
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g_base = NULL;
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INFO_LOG(MEMMAP, "Memory system shut down.");
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NOTICE_LOG(MEMMAP, "Memory system shut down.");
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}
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@ -67,6 +67,9 @@ u8 Read8(const u32 addr);
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u16 Read16(const u32 addr);
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u32 Read32(const u32 addr);
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u32 Read8_ZX(const u32 addr);
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u32 Read16_ZX(const u32 addr);
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void Write8(const u32 addr, const u32 data);
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void Write16(const u32 addr, const u32 data);
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void Write32(const u32 addr, const u32 data);
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@ -29,22 +29,22 @@
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namespace Memory {
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/*
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u8 *GetPointer(const u32 address)
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u8 *GetPointer(const u32 addr)
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{
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if ((address & 0x3E000000) == 0x08000000) {
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return g_fcram + (address & MEM_FCRAM_MASK);
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if ((addr & 0x3E000000) == 0x08000000) {
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return g_fcram + (addr & MEM_FCRAM_MASK);
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}
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else if ((address & 0x3F800000) == 0x04000000) {
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return m_pVRAM + (address & VRAM_MASK);
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else if ((addr & 0x3F800000) == 0x04000000) {
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return m_pVRAM + (addr & VRAM_MASK);
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}
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else if ((address & 0x3F000000) >= 0x08000000 && (address & 0x3F000000) < 0x08000000 + g_MemorySize) {
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return m_pRAM + (address & g_MemoryMask);
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else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + g_MemorySize) {
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return m_pRAM + (addr & g_MemoryMask);
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}
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else {
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ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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static bool reported = false;
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if (!reported) {
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Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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reported = true;
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}
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if (!g_Config.bIgnoreBadMemAccess) {
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@ -56,102 +56,121 @@ u8 *GetPointer(const u32 address)
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}*/
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template <typename T>
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inline void ReadFromHardware(T &var, const u32 address)
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inline void ReadFromHardware(T &var, const u32 addr)
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{
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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// TODO: Make sure this represents the mirrors in a correct way.
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// Could just do a base-relative read, too.... TODO
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if ((address & 0x3E000000) == 0x08000000) {
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var = *((const T*)&g_fcram[address & MEM_FCRAM_MASK]);
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if ((addr & 0x3E000000) == 0x08000000) {
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var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]);
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}
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/*else if ((address & 0x3F800000) == 0x04000000) {
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var = *((const T*)&m_pVRAM[address & VRAM_MASK]);
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/*else if ((addr & 0x3F800000) == 0x04000000) {
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var = *((const T*)&m_pVRAM[addr & VRAM_MASK]);
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}*/
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else {
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_assert_msg_(MEMMAP, false, "unknown hardware read");
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// WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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// WARN_LOG(MEMMAP, "ReadFromHardware: Invalid addr %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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}
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}
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template <typename T>
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inline void WriteToHardware(u32 address, const T data)
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{
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// Could just do a base-relative write, too.... TODO
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if ((address & 0x3E000000) == 0x08000000) {
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*(T*)&g_fcram[address & MEM_FCRAM_MASK] = data;
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}
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/*else if ((address & 0x3F800000) == 0x04000000) {
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*(T*)&m_pVRAM[address & VRAM_MASK] = data;
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}*/
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else {
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inline void WriteToHardware(u32 addr, const T data) {
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NOTICE_LOG(MEMMAP, "Test1 %08X", addr);
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// ExeFS:/.code is loaded here:
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if ((addr & 0xFFF00000) == 0x00100000) {
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// TODO(ShizZy): This is dumb... handle correctly. From 3DBrew:
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// http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions
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// The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when
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// the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only
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// applies when this flag is clear. Executables are usually loaded to 0x14000000 when the
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// exheader "special memory" flag is set, however this address can be arbitrary.
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*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
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NOTICE_LOG(MEMMAP, "Test2");
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// Heap mapped by ControlMemory:
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} else if ((addr & 0x3E000000) == 0x08000000) {
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// TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP
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// heap size... the following is writing to FCRAM + 0, which is actually supposed to be the
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// application's GSP heap
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*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
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} else if ((addr & 0xFF000000) == 0x14000000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to GSP heap");
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} else if ((addr & 0xFFF00000) == 0x1EC00000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to IO registers");
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} else if ((addr & 0xFF000000) == 0x1F000000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to VRAM");
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} else if ((addr & 0xFFF00000) == 0x1FF00000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
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} else if ((addr & 0xFFFF0000) == 0x1FF80000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
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} else if ((addr & 0xFFFFF000) == 0x1FF81000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to shared page");
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} else {
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_assert_msg_(MEMMAP, false, "unknown hardware write");
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// WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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}
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}
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bool IsValidAddress(const u32 address) {
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if ((address & 0x3E000000) == 0x08000000) {
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bool IsValidAddress(const u32 addr) {
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if ((addr & 0x3E000000) == 0x08000000) {
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return true;
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} else if ((address & 0x3F800000) == 0x04000000) {
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} else if ((addr & 0x3F800000) == 0x04000000) {
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return true;
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} else if ((address & 0xBFFF0000) == 0x00010000) {
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} else if ((addr & 0xBFFF0000) == 0x00010000) {
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return true;
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} else if ((address & 0x3F000000) >= 0x08000000 && (address & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) {
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} else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) {
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return true;
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} else {
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return false;
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}
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}
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u8 Read_U8(const u32 _Address) {
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u8 Read8(const u32 addr) {
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u8 _var = 0;
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ReadFromHardware<u8>(_var, _Address);
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ReadFromHardware<u8>(_var, addr);
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return (u8)_var;
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}
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u16 Read_U16(const u32 _Address) {
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u16 Read16(const u32 addr) {
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u16_le _var = 0;
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ReadFromHardware<u16_le>(_var, _Address);
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ReadFromHardware<u16_le>(_var, addr);
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return (u16)_var;
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}
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u32 Read_U32(const u32 _Address) {
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u32 Read32(const u32 addr) {
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u32_le _var = 0;
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ReadFromHardware<u32_le>(_var, _Address);
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ReadFromHardware<u32_le>(_var, addr);
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return _var;
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}
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u64 Read_U64(const u32 _Address) {
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u64 Read64(const u32 addr) {
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u64_le _var = 0;
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ReadFromHardware<u64_le>(_var, _Address);
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ReadFromHardware<u64_le>(_var, addr);
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return _var;
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}
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u32 Read_U8_ZX(const u32 _Address) {
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return (u32)Read_U8(_Address);
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u32 Read8_ZX(const u32 addr) {
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return (u32)Read8(addr);
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}
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u32 Read_U16_ZX(const u32 _Address) {
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return (u32)Read_U16(_Address);
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u32 Read16_ZX(const u32 addr) {
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return (u32)Read16(addr);
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}
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void Write_U8(const u8 _Data, const u32 _Address) {
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WriteToHardware<u8>(_Address, _Data);
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void Write8(const u32 addr, const u8 data) {
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WriteToHardware<u8>(addr, data);
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}
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void Write_U16(const u16 _Data, const u32 _Address) {
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WriteToHardware<u16_le>(_Address, _Data);
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void Write16(const u32 addr, const u16 data) {
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WriteToHardware<u16_le>(addr, data);
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}
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void Write_U32(const u32 _Data, const u32 _Address) {
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WriteToHardware<u32_le>(_Address, _Data);
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void Write32(const u32 addr, const u32 data) {
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WriteToHardware<u32_le>(addr, data);
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}
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void Write_U64(const u64 _Data, const u32 _Address) {
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WriteToHardware<u64_le>(_Address, _Data);
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void Write64(const u32 addr, const u64 data) {
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WriteToHardware<u64_le>(addr, data);
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}
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} // namespace
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