ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode name
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2c663fbc3e
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d29578d467
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@ -738,23 +738,23 @@ std::string ARM_Disasm::DisassembleMemHalf(u32 insn)
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if (is_immed) {
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if (is_pre) {
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if (offset == 0) {
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return Common::StringFromFormat("%s%sh\tr%d, [r%d]", opname, cond_to_str(cond), rd, rn);
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return Common::StringFromFormat("%s%s%s\tr%d, [r%d]", opname, cond_to_str(cond), width, rd, rn);
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} else {
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return Common::StringFromFormat("%s%sh\tr%d, [r%d, #%s%u]%s",
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opname, cond_to_str(cond), rd, rn, minus, offset, bang);
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return Common::StringFromFormat("%s%s%s\tr%d, [r%d, #%s%u]%s",
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opname, cond_to_str(cond), width, rd, rn, minus, offset, bang);
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}
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} else {
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return Common::StringFromFormat("%s%sh\tr%d, [r%d], #%s%u",
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opname, cond_to_str(cond), rd, rn, minus, offset);
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return Common::StringFromFormat("%s%s%s\tr%d, [r%d], #%s%u",
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opname, cond_to_str(cond), width, rd, rn, minus, offset);
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}
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}
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if (is_pre) {
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return Common::StringFromFormat("%s%sh\tr%d, [r%d, %sr%d]%s",
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opname, cond_to_str(cond), rd, rn, minus, rm, bang);
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return Common::StringFromFormat("%s%s%s\tr%d, [r%d, %sr%d]%s",
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opname, cond_to_str(cond), width, rd, rn, minus, rm, bang);
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} else {
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return Common::StringFromFormat("%s%sh\tr%d, [r%d], %sr%d",
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opname, cond_to_str(cond), rd, rn, minus, rm);
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return Common::StringFromFormat("%s%s%s\tr%d, [r%d], %sr%d",
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opname, cond_to_str(cond), width, rd, rn, minus, rm);
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}
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}
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