- added CallMCR function to coprocessor HLE module
- moved instruction decoding to coprocessor HLE module
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c1e71ae1ac
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f7c6302009
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@ -661,7 +661,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
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void
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ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
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{
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unsigned cpab;
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HLE::CallMCR(instr, source);
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//unsigned cpab;
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////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
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//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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@ -671,29 +672,29 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
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// return;
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//}
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cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
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//cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
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while (cpab == ARMul_BUSY) {
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ARMul_Icycles (state, 1, 0);
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//while (cpab == ARMul_BUSY) {
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// ARMul_Icycles (state, 1, 0);
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if (IntPending (state)) {
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cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
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instr, 0);
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return;
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}
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else
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cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
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source);
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}
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// if (IntPending (state)) {
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// cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
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// instr, 0);
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// return;
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// }
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// else
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// cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
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// source);
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//}
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if (cpab == ARMul_CANT) {
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printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
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ARMul_Abort (state, ARMul_UndefinedInstrV);
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}
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else {
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BUSUSEDINCPCN;
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ARMul_Ccycles (state, 1, 0);
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}
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//if (cpab == ARMul_CANT) {
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// printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
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// ARMul_Abort (state, ARMul_UndefinedInstrV);
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//}
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//else {
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// BUSUSEDINCPCN;
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// ARMul_Ccycles (state, 1, 0);
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//}
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}
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/* This function does the Busy-Waiting for an MCRR instruction. */
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@ -739,7 +740,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
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{
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unsigned cpab;
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ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27));
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ARMword result = HLE::CallMRC(instr);
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////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
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//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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@ -44,8 +44,18 @@ Addr GetThreadCommandBuffer() {
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return CMD_BUFFER_ADDR;
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}
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/// Call an MRC operation in HLE
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u32 CallMRC(ARM11_MRC_OPERATION operation) {
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/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
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s32 CallMCR(u32 instruction, u32 value) {
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CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
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ERROR_LOG(OSHLE, "unimplemented MCR instruction=0x%08X, operation=%02X, value=%08X",
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instruction, operation, value);
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return -1;
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}
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/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
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s32 CallMRC(u32 instruction) {
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CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
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switch (operation) {
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case DATA_SYNCHRONIZATION_BARRIER:
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@ -55,7 +65,7 @@ u32 CallMRC(ARM11_MRC_OPERATION operation) {
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return GetThreadCommandBuffer();
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default:
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ERROR_LOG(OSHLE, "unimplemented MRC operation 0x%02X", operation);
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ERROR_LOG(OSHLE, "unimplemented MRC instruction 0x%08X", instruction);
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break;
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}
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return -1;
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@ -8,13 +8,16 @@
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namespace HLE {
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/// MRC operations (ARM register from coprocessor), decoded as instr[20:27]
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enum ARM11_MRC_OPERATION {
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/// Coprocessor operations
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enum CoprocessorOperation {
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DATA_SYNCHRONIZATION_BARRIER = 0xE0,
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CALL_GET_THREAD_COMMAND_BUFFER = 0xE1,
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};
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/// Call an MRC operation in HLE
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u32 CallMRC(ARM11_MRC_OPERATION operation);
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/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
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s32 CallMCR(u32 instruction, u32 value);
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/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
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s32 CallMRC(u32 instruction);
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} // namespace
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