dyncom: Move helper functions to their own header
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6b73e4566b
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0191c26521
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@ -134,6 +134,7 @@ set(HEADERS
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arm/skyeye_common/arm_regformat.h
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arm/skyeye_common/armdefs.h
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arm/skyeye_common/armmmu.h
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arm/skyeye_common/armsupp.h
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arm/skyeye_common/vfp/asm_vfp.h
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arm/skyeye_common/vfp/vfp.h
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arm/skyeye_common/vfp/vfp_helper.h
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@ -7,6 +7,7 @@
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#include "common/make_unique.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armsupp.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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#include "core/arm/dyncom/arm_dyncom.h"
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@ -2,8 +2,8 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/dyncom/arm_dyncom_dec.h"
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#include "core/arm/skyeye_common/armsupp.h"
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const ISEITEM arm_instruction[] = {
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{ "vmla", 4, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 4, 4, 0 }},
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@ -414,7 +414,7 @@ const ISEITEM arm_exclusion_code[] = {
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{ "invalid", 0, INVALID, { 0 }}
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};
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int decode_arm_instr(uint32_t instr, int32_t *idx) {
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int decode_arm_instr(u32 instr, s32* idx) {
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int n = 0;
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int base = 0;
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int ret = DECODE_FAILURE;
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@ -4,7 +4,9 @@
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#pragma once
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int decode_arm_instr(uint32_t instr, int32_t *idx);
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#include "common/common_types.h"
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int decode_arm_instr(u32 instr, s32* idx);
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enum DECODE_STATUS {
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DECODE_SUCCESS,
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@ -19,6 +19,7 @@
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#include "core/arm/dyncom/arm_dyncom_run.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armmmu.h"
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#include "core/arm/skyeye_common/armsupp.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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Common::Profiling::TimingCategory profile_execute("DynCom::Execute");
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@ -6,6 +6,7 @@
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// ARM instruction, and using the existing ARM simulator.
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#include "core/arm/dyncom/arm_dyncom_thumb.h"
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#include "core/arm/skyeye_common/armsupp.h"
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// Decode a 16bit Thumb instruction. The instruction is in the low 16-bits of the tinstr field,
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// with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions
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@ -22,9 +22,6 @@
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#include "common/common_types.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
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#define BIT(s, n) ((s >> (n)) & 1)
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// Signal levels
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enum {
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LOW = 0,
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@ -47,9 +44,6 @@ enum {
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ABORT_BASE_UPDATED = 2
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};
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#define POS(i) ( (~(i)) >> 31 )
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#define NEG(i) ( (i) >> 31 )
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typedef u64 ARMdword; // must be 64 bits wide
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typedef u32 ARMword; // must be 32 bits wide
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typedef u16 ARMhword; // must be 16 bits wide
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@ -288,31 +282,3 @@ enum {
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ONCE = 2, // Execute just one iteration
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RUN = 3 // Continuous execution
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};
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bool AddOverflow(ARMword, ARMword, ARMword);
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bool SubOverflow(ARMword, ARMword, ARMword);
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void ARMul_SelectProcessor(ARMul_State*, unsigned);
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u32 AddWithCarry(u32, u32, u32, bool*, bool*);
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bool ARMul_AddOverflowQ(ARMword, ARMword);
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u8 ARMul_SignedSaturatedAdd8(u8, u8);
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u8 ARMul_SignedSaturatedSub8(u8, u8);
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u16 ARMul_SignedSaturatedAdd16(u16, u16);
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u16 ARMul_SignedSaturatedSub16(u16, u16);
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u8 ARMul_UnsignedSaturatedAdd8(u8, u8);
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u16 ARMul_UnsignedSaturatedAdd16(u16, u16);
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u8 ARMul_UnsignedSaturatedSub8(u8, u8);
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u16 ARMul_UnsignedSaturatedSub16(u16, u16);
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u8 ARMul_UnsignedAbsoluteDifference(u8, u8);
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u32 ARMul_SignedSatQ(s32, u8, bool*);
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u32 ARMul_UnsignedSatQ(s32, u8, bool*);
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bool InBigEndianMode(ARMul_State*);
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bool InAPrivilegedMode(ARMul_State*);
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u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2);
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void WriteCP15Register(ARMul_State* cpu, u32 value, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2);
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@ -24,6 +24,7 @@
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#include "core/memory.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armsupp.h"
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// Register numbers in the MMU
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enum
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@ -18,8 +18,9 @@
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#include "common/logging/log.h"
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#include "core/mem_map.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armsupp.h"
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// Unsigned sum of absolute difference
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u8 ARMul_UnsignedAbsoluteDifference(u8 left, u8 right)
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@ -47,21 +48,21 @@ u32 AddWithCarry(u32 left, u32 right, u32 carry_in, bool* carry_out_occurred, bo
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}
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// Compute whether an addition of A and B, giving RESULT, overflowed.
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bool AddOverflow(ARMword a, ARMword b, ARMword result)
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bool AddOverflow(u32 a, u32 b, u32 result)
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{
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return ((NEG(a) && NEG(b) && POS(result)) ||
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(POS(a) && POS(b) && NEG(result)));
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}
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// Compute whether a subtraction of A and B, giving RESULT, overflowed.
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bool SubOverflow(ARMword a, ARMword b, ARMword result)
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bool SubOverflow(u32 a, u32 b, u32 result)
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{
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return ((NEG(a) && POS(b) && POS(result)) ||
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(POS(a) && NEG(b) && NEG(result)));
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}
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// Returns true if the Q flag should be set as a result of overflow.
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bool ARMul_AddOverflowQ(ARMword a, ARMword b)
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bool ARMul_AddOverflowQ(u32 a, u32 b)
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{
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u32 result = a + b;
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if (((result ^ a) & (u32)0x80000000) && ((a ^ b) & (u32)0x80000000) == 0)
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@ -0,0 +1,42 @@
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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struct ARMul_State;
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#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
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#define BIT(s, n) ((s >> (n)) & 1)
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#define POS(i) ( (~(i)) >> 31 )
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#define NEG(i) ( (i) >> 31 )
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bool AddOverflow(u32, u32, u32);
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bool SubOverflow(u32, u32, u32);
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void ARMul_SelectProcessor(ARMul_State*, unsigned);
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u32 AddWithCarry(u32, u32, u32, bool*, bool*);
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bool ARMul_AddOverflowQ(u32, u32);
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u8 ARMul_SignedSaturatedAdd8(u8, u8);
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u8 ARMul_SignedSaturatedSub8(u8, u8);
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u16 ARMul_SignedSaturatedAdd16(u16, u16);
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u16 ARMul_SignedSaturatedSub16(u16, u16);
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u8 ARMul_UnsignedSaturatedAdd8(u8, u8);
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u16 ARMul_UnsignedSaturatedAdd16(u16, u16);
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u8 ARMul_UnsignedSaturatedSub8(u8, u8);
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u16 ARMul_UnsignedSaturatedSub16(u16, u16);
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u8 ARMul_UnsignedAbsoluteDifference(u8, u8);
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u32 ARMul_SignedSatQ(s32, u8, bool*);
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u32 ARMul_UnsignedSatQ(s32, u8, bool*);
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bool InBigEndianMode(ARMul_State*);
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bool InAPrivilegedMode(ARMul_State*);
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u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2);
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void WriteCP15Register(ARMul_State* cpu, u32 value, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2);
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