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video_core/command_processor: correctly handles 0xFFFF index as a normal index

This commit is contained in:
wwylele 2018-05-05 04:24:31 +03:00
parent 7bffd7c1b0
commit 08a38370b0
1 changed files with 3 additions and 6 deletions
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9
src/video_core/command_processor.cpp
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@ -323,12 +323,12 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
// Simple circular-replacement vertex cache // Simple circular-replacement vertex cache
// The size has been tuned for optimal balance between hit-rate and the cost of lookup // The size has been tuned for optimal balance between hit-rate and the cost of lookup
const size_t VERTEX_CACHE_SIZE = 32; const size_t VERTEX_CACHE_SIZE = 32;
std::array<bool, VERTEX_CACHE_SIZE> vertex_cache_valid{};
std::array<u16, VERTEX_CACHE_SIZE> vertex_cache_ids; std::array<u16, VERTEX_CACHE_SIZE> vertex_cache_ids;
std::array<Shader::AttributeBuffer, VERTEX_CACHE_SIZE> vertex_cache; std::array<Shader::AttributeBuffer, VERTEX_CACHE_SIZE> vertex_cache;
Shader::AttributeBuffer vs_output; Shader::AttributeBuffer vs_output;
unsigned int vertex_cache_pos = 0; unsigned int vertex_cache_pos = 0;
vertex_cache_ids.fill(-1);
auto* shader_engine = Shader::GetEngine(); auto* shader_engine = Shader::GetEngine();
Shader::UnitState shader_unit; Shader::UnitState shader_unit;
@ -346,10 +346,6 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index]) is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index])
: (index + regs.pipeline.vertex_offset); : (index + regs.pipeline.vertex_offset);
// -1 is a common special value used for primitive restart. Since it's unknown if
// the PICA supports it, and it would mess up the caching, guard against it here.
ASSERT(vertex != -1);
bool vertex_cache_hit = false; bool vertex_cache_hit = false;
if (is_indexed) { if (is_indexed) {
@ -365,7 +361,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
} }
for (unsigned int i = 0; i < VERTEX_CACHE_SIZE; ++i) { for (unsigned int i = 0; i < VERTEX_CACHE_SIZE; ++i) {
if (vertex == vertex_cache_ids[i]) { if (vertex_cache_valid[i] && vertex == vertex_cache_ids[i]) {
vs_output = vertex_cache[i]; vs_output = vertex_cache[i];
vertex_cache_hit = true; vertex_cache_hit = true;
break; break;
@ -388,6 +384,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
if (is_indexed) { if (is_indexed) {
vertex_cache[vertex_cache_pos] = vs_output; vertex_cache[vertex_cache_pos] = vs_output;
vertex_cache_valid[vertex_cache_pos] = true;
vertex_cache_ids[vertex_cache_pos] = vertex; vertex_cache_ids[vertex_cache_pos] = vertex;
vertex_cache_pos = (vertex_cache_pos + 1) % VERTEX_CACHE_SIZE; vertex_cache_pos = (vertex_cache_pos + 1) % VERTEX_CACHE_SIZE;
} }