commit
2188af4a65
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@ -168,6 +168,12 @@ public:
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}
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}
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// TODO: we may want to change this to explicit operator bool() if it's bug-free in VS2015
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__forceinline bool ToBool() const
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{
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return Value() != 0;
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}
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private:
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// StorageType is T for non-enum types and the underlying type of T if
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// T is an enumeration. Note that T is wrapped within an enable_if in the
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@ -56,8 +56,6 @@
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#define RN ((instr >> 16) & 0xF)
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/*xxxx xxxx xxxx xxxx xxxx xxxx xxxx 1111 */
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#define RM (instr & 0xF)
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#define BIT(n) ((instr >> (n)) & 1)
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#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1))
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/* CP15 registers */
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#define OPCODE_1 BITS(21, 23)
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@ -3798,9 +3798,9 @@ unsigned InterpreterMainLoop(ARMul_State* state)
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#define INC_ICOUNTER cpu->icounter++; \
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if(cpu->Reg[15] > 0xc0000000) \
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cpu->kernel_icounter++;
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//if (debug_function(core)) \
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/*if (debug_function(core)) \
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if (core->check_int_flag) \
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goto END
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goto END*/
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//LOG_TRACE(Core_ARM11, "icounter is %llx pc is %x\n", cpu->icounter, cpu->Reg[15])
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#else
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#define INC_ICOUNTER ;
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@ -4021,18 +4021,18 @@ unsigned InterpreterMainLoop(ARMul_State* state)
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#define UPDATE_NFLAG(dst) (cpu->NFlag = BIT(dst, 31) ? 1 : 0)
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#define UPDATE_ZFLAG(dst) (cpu->ZFlag = dst ? 0 : 1)
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// #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) || \
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/* #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) || \
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(ISNEG(lop) && ISPOS(dst)) || \
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(ISPOS(rop) && ISPOS(dst))))
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(ISPOS(rop) && ISPOS(dst)))) */
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#define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((dst < lop) || (dst < rop)))
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#define UPDATE_CFLAG_CARRY_FROM_ADD(lop, rop, flag) (cpu->CFlag = (((uint64_t) lop + (uint64_t) rop + (uint64_t) flag) > 0xffffffff) )
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#define UPDATE_CFLAG_NOT_BORROW_FROM_FLAG(lop, rop, flag) (cpu->CFlag = ((uint64_t) lop >= ((uint64_t) rop + (uint64_t) flag)))
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#define UPDATE_CFLAG_NOT_BORROW_FROM(lop, rop) (cpu->CFlag = (lop >= rop))
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#define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) (cpu->CFlag = !(dst < lop))
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#define UPDATE_CFLAG_WITH_SC cpu->CFlag = cpu->shifter_carry_out
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// #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) || \
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/* #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) || \
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(ISNEG(lop) && ISPOS(dst)) || \
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(ISPOS(rop) && ISPOS(dst)))
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(ISPOS(rop) && ISPOS(dst))) */
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#define UPDATE_VFLAG(dst, lop, rop) (cpu->VFlag = (((lop < 0) && (rop < 0) && (dst >= 0)) || \
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((lop >= 0) && (rop) >= 0 && (dst < 0))))
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#define UPDATE_VFLAG_WITH_NOT(dst, lop, rop) (cpu->VFlag = !(((lop < 0) && (rop < 0) && (dst >= 0)) || \
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@ -29,7 +29,6 @@
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void switch_mode(arm_core_t *core, uint32_t mode)
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{
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uint32_t tmp1, tmp2;
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if (core->Mode == mode) {
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//Mode not changed.
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//printf("mode not changed\n");
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@ -315,8 +315,8 @@ Interface::Interface() {
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if (file.IsOpen()) {
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// Read shared font data
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shared_font.resize(file.GetSize());
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file.ReadBytes(shared_font.data(), file.GetSize());
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shared_font.resize((size_t)file.GetSize());
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file.ReadBytes(shared_font.data(), (size_t)file.GetSize());
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// Create shared font memory object
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shared_font_mem = Kernel::CreateSharedMemory("APT_U:shared_font_mem");
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@ -90,7 +90,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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const auto& index_info = registers.index_array;
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const u8* index_address_8 = Memory::GetPointer(PAddrToVAddr(base_address + index_info.offset));
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const u16* index_address_16 = (u16*)index_address_8;
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bool index_u16 = (bool)index_info.format;
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bool index_u16 = index_info.format != 0;
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DebugUtils::GeometryDumper geometry_dumper;
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PrimitiveAssembler<VertexShader::OutputVertex> clipper_primitive_assembler(registers.triangle_topology.Value());
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@ -164,7 +164,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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case PICA_REG_INDEX(vs_bool_uniforms):
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for (unsigned i = 0; i < 16; ++i)
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VertexShader::GetBoolUniform(i) = (registers.vs_bool_uniforms.Value() & (1 << i));
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VertexShader::GetBoolUniform(i) = (registers.vs_bool_uniforms.Value() & (1 << i)) != 0;
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break;
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@ -201,9 +201,9 @@ struct Regs {
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};
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const std::array<FullTextureConfig, 3> GetTextures() const {
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return {{
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{ static_cast<bool>(texture0_enable), texture0, texture0_format },
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{ static_cast<bool>(texture1_enable), texture1, texture1_format },
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{ static_cast<bool>(texture2_enable), texture2, texture2_format }
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{ texture0_enable.ToBool(), texture0, texture0_format },
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{ texture1_enable.ToBool(), texture1, texture1_format },
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{ texture2_enable.ToBool(), texture2, texture2_format }
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}};
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}
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@ -590,11 +590,11 @@ struct Regs {
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static std::string GetCommandName(int index) {
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std::map<u32, std::string> map;
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Regs regs;
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#define ADD_FIELD(name) \
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do { \
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map.insert({PICA_REG_INDEX(name), #name}); \
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for (u32 i = PICA_REG_INDEX(name) + 1; i < PICA_REG_INDEX(name) + sizeof(regs.name) / 4; ++i) \
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/* TODO: change to Regs::name when VS2015 and other compilers support it */ \
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for (u32 i = PICA_REG_INDEX(name) + 1; i < PICA_REG_INDEX(name) + sizeof(Regs().name) / 4; ++i) \
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map.insert({i, #name + std::string("+") + std::to_string(i-PICA_REG_INDEX(name))}); \
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} while(false)
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