pica/regs: layout geometry shader configuration regs
All the register meanings are derived from ctrulib (3dbrew is outdated for most of them)
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@ -147,7 +147,15 @@ struct PipelineRegs {
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// Number of vertices to render
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u32 num_vertices;
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INSERT_PADDING_WORDS(0x1);
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enum class UseGS : u32 {
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No = 0,
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Yes = 2,
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};
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union {
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BitField<0, 2, UseGS> use_gs;
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BitField<31, 1, u32> variable_primitive;
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};
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// The index of the first vertex to render
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u32 vertex_offset;
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@ -218,7 +226,29 @@ struct PipelineRegs {
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GPUMode gpu_mode;
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INSERT_PADDING_WORDS(0x18);
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INSERT_PADDING_WORDS(0x4);
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BitField<0, 4, u32> vs_outmap_total_minus_1_a;
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INSERT_PADDING_WORDS(0x6);
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BitField<0, 4, u32> vs_outmap_total_minus_1_b;
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enum class GSMode : u32 {
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Point = 0,
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VariablePrimitive = 1,
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FixedPrimitive = 2,
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};
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union {
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BitField<0, 8, GSMode> mode;
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BitField<8, 4, u32> fixed_vertex_num_minus_1;
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BitField<12, 4, u32> stride_minus_1;
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BitField<16, 4, u32> start_index;
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} gs_config;
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INSERT_PADDING_WORDS(0x1);
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u32 variable_vertex_main_num_minus_1;
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INSERT_PADDING_WORDS(0x9);
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enum class TriangleTopology : u32 {
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List = 0,
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@ -24,9 +24,16 @@ struct ShaderRegs {
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INSERT_PADDING_WORDS(0x4);
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enum ShaderMode {
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GS = 0x08,
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VS = 0xA0,
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};
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union {
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// Number of input attributes to shader unit - 1
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BitField<0, 4, u32> max_input_attribute_index;
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BitField<8, 8, u32> input_to_uniform;
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BitField<24, 8, ShaderMode> shader_mode;
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};
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// Offset to shader program entry point (in words)
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