Clean up armdefs.h
This commit is contained in:
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9ce11b2d92
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f6cb8c1927
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@ -18,38 +18,26 @@
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#ifndef _ARMDEFS_H_
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#ifndef _ARMDEFS_H_
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#define _ARMDEFS_H_
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#define _ARMDEFS_H_
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#include <stdio.h>
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#include <cerrno>
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#include <stdlib.h>
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#include <csignal>
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#include <errno.h>
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#include <cstdio>
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#include <cstdlib>
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#include "common/platform.h"
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#include <cstring>
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#include <fcntl.h>
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//teawater add for arm2x86 2005.02.14-------------------------------------------
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#include <sys/stat.h>
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// koodailar remove it for mingw 2005.12.18----------------
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#include <sys/types.h>
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//anthonylee modify it for portable 2007.01.30
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//#include "portable/mman.h"
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#include "arm_regformat.h"
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#include "arm_regformat.h"
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#include "common/common_types.h"
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#include "common/platform.h"
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#include "common/platform.h"
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#include "core/arm/skyeye_common/armmmu.h"
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#include "core/arm/skyeye_common/skyeye_defs.h"
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#include "core/arm/skyeye_common/skyeye_defs.h"
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//AJ2D--------------------------------------------------------------------------
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//teawater add for arm2x86 2005.07.03-------------------------------------------
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#include <sys/types.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#if EMU_PLATFORM == PLATFORM_LINUX
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#if EMU_PLATFORM == PLATFORM_LINUX
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#include <sys/time.h>
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#include <unistd.h>
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#include <unistd.h>
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#endif
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#endif
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#include <errno.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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//#include <memory_space.h>
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//AJ2D--------------------------------------------------------------------------
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#if 0
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#if 0
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#if 0
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#if 0
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#define DIFF_STATE 1
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#define DIFF_STATE 1
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@ -70,25 +58,8 @@
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#define LOWHIGH 1
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#define LOWHIGH 1
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#define HIGHLOW 2
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#define HIGHLOW 2
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//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
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#include <signal.h>
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#include "common/platform.h"
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#if EMU_PLATFORM == PLATFORM_LINUX
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#include <sys/time.h>
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#endif
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//#define DBCT_TEST_SPEED
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//#define DBCT_TEST_SPEED
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#define DBCT_TEST_SPEED_SEC 10
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#define DBCT_TEST_SPEED_SEC 10
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//AJ2D--------------------------------------------------------------------------
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//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
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//#define DBCT_GDBRSP
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//AJ2D--------------------------------------------------------------------------
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//#include <skyeye_defs.h>
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//#include <skyeye_types.h>
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#define ARM_BYTE_TYPE 0
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#define ARM_BYTE_TYPE 0
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#define ARM_HALFWORD_TYPE 1
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#define ARM_HALFWORD_TYPE 1
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@ -103,71 +74,34 @@
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typedef char *VoidStar;
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typedef char *VoidStar;
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#endif
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#endif
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typedef unsigned long long ARMdword; /* must be 64 bits wide */
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typedef u64 ARMdword; // must be 64 bits wide
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typedef unsigned int ARMword; /* must be 32 bits wide */
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typedef u32 ARMword; // must be 32 bits wide
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typedef unsigned char ARMbyte; /* must be 8 bits wide */
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typedef u16 ARMhword; // must be 16 bits wide
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typedef unsigned short ARMhword; /* must be 16 bits wide */
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typedef u8 ARMbyte; // must be 8 bits wide
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typedef struct ARMul_State ARMul_State;
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typedef struct ARMul_State ARMul_State;
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typedef struct ARMul_io ARMul_io;
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typedef struct ARMul_io ARMul_io;
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typedef struct ARMul_Energy ARMul_Energy;
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typedef struct ARMul_Energy ARMul_Energy;
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//teawater add for arm2x86 2005.06.24-------------------------------------------
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#include <stdint.h>
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//AJ2D--------------------------------------------------------------------------
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/*
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//chy 2005-05-11
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#ifndef __CYGWIN__
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//teawater add for arm2x86 2005.02.14-------------------------------------------
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typedef unsigned char uint8_t;
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typedef unsigned short uint16_t;
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typedef unsigned int u32;
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#if defined (__x86_64__)
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typedef unsigned long uint64_t;
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#else
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typedef unsigned long long uint64_t;
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#endif
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////AJ2D--------------------------------------------------------------------------
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#endif
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*/
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#include "core/arm/skyeye_common/armmmu.h"
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typedef unsigned ARMul_CPInits(ARMul_State* state);
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//#include "lcd/skyeye_lcd.h"
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typedef unsigned ARMul_CPExits(ARMul_State* state);
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typedef unsigned ARMul_LDCs(ARMul_State* state, unsigned type, ARMword instr, ARMword value);
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typedef unsigned ARMul_STCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value);
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//#include "skyeye.h"
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typedef unsigned ARMul_MRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value);
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//#include "skyeye_device.h"
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typedef unsigned ARMul_MCRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value);
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//#include "net/skyeye_net.h"
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typedef unsigned ARMul_MRRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value1, ARMword* value2);
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//#include "skyeye_config.h"
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typedef unsigned ARMul_MCRRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value1, ARMword value2);
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typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr);
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typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value);
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typedef unsigned ARMul_CPInits (ARMul_State * state);
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typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value);
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typedef unsigned ARMul_CPExits (ARMul_State * state);
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typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
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ARMword instr, ARMword value);
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typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
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ARMword instr, ARMword * value);
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typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
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ARMword instr, ARMword * value);
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typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
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ARMword instr, ARMword value);
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typedef unsigned ARMul_MRRCs (ARMul_State * state, unsigned type,
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ARMword instr, ARMword * value1, ARMword * value2);
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typedef unsigned ARMul_MCRRs (ARMul_State * state, unsigned type,
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ARMword instr, ARMword value1, ARMword value2);
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typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
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ARMword instr);
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typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
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ARMword * value);
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typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
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ARMword value);
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//added by ksh,2004-3-5
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//added by ksh,2004-3-5
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struct ARMul_io
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struct ARMul_io
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{
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{
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ARMword *instr; //to display the current interrupt state
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ARMword *instr; // to display the current interrupt state
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ARMword *net_flag; //to judge if network is enabled
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ARMword *net_flag; // to judge if network is enabled
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ARMword *net_int; //netcard interrupt
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ARMword *net_int; // netcard interrupt
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//ywc,2004-04-01
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//ywc,2004-04-01
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ARMword *ts_int;
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ARMword *ts_int;
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@ -180,17 +114,17 @@ struct ARMul_io
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/* added by ksh,2004-11-26,some energy profiling */
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/* added by ksh,2004-11-26,some energy profiling */
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struct ARMul_Energy
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struct ARMul_Energy
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{
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{
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int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */
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int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */
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int enable_func_energy; /* <tktan> BUG200105181702 */
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int enable_func_energy; /* <tktan> BUG200105181702 */
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char *func_energy;
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char *func_energy;
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int func_display; /* <tktan> BUG200103311509 : for function call display */
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int func_display; /* <tktan> BUG200103311509 : for function call display */
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int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */
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int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */
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char *start_func; /* <tktan> BUG200104191428 */
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char *start_func; /* <tktan> BUG200104191428 */
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FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */
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FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */
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long long tcycle, pcycle;
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long long tcycle, pcycle;
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float t_energy;
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float t_energy;
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void *cur_task; /* <tktan> BUG200103291737 */
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void *cur_task; /* <tktan> BUG200103291737 */
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long long t_mem_cycle, t_idle_cycle, t_uart_cycle;
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long long t_mem_cycle, t_idle_cycle, t_uart_cycle;
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long long p_mem_cycle, p_idle_cycle, p_uart_cycle;
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long long p_mem_cycle, p_idle_cycle, p_uart_cycle;
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long long p_io_update_tcycle;
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long long p_io_update_tcycle;
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@ -203,13 +137,12 @@ struct ARMul_Energy
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typedef struct mem_bank
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typedef struct mem_bank
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{
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{
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ARMword (*read_byte) (ARMul_State * state, ARMword addr);
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ARMword (*read_byte) (ARMul_State* state, ARMword addr);
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void (*write_byte) (ARMul_State * state, ARMword addr, ARMword data);
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void (*write_byte) (ARMul_State* state, ARMword addr, ARMword data);
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ARMword (*read_halfword) (ARMul_State * state, ARMword addr);
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ARMword (*read_halfword) (ARMul_State* state, ARMword addr);
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void (*write_halfword) (ARMul_State * state, ARMword addr,
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void (*write_halfword) (ARMul_State* state, ARMword addr, ARMword data);
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ARMword data);
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ARMword (*read_word) (ARMul_State* state, ARMword addr);
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ARMword (*read_word) (ARMul_State * state, ARMword addr);
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void (*write_word) (ARMul_State* state, ARMword addr, ARMword data);
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void (*write_word) (ARMul_State * state, ARMword addr, ARMword data);
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unsigned int addr, len;
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unsigned int addr, len;
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char filename[MAX_STR];
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char filename[MAX_STR];
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unsigned type; //chy 2003-09-21: maybe io,ram,rom
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unsigned type; //chy 2003-09-21: maybe io,ram,rom
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@ -224,24 +157,24 @@ typedef struct
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#define VFP_REG_NUM 64
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#define VFP_REG_NUM 64
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struct ARMul_State
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struct ARMul_State
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{
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{
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ARMword Emulate; /* to start and stop emulation */
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ARMword Emulate; /* to start and stop emulation */
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unsigned EndCondition; /* reason for stopping */
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unsigned EndCondition; /* reason for stopping */
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unsigned ErrorCode; /* type of illegal instruction */
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unsigned ErrorCode; /* type of illegal instruction */
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/* Order of the following register should not be modified */
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/* Order of the following register should not be modified */
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ARMword Reg[16]; /* the current register file */
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ARMword Reg[16]; /* the current register file */
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ARMword Cpsr; /* the current psr */
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ARMword Cpsr; /* the current psr */
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ARMword Spsr_copy;
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ARMword Spsr_copy;
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ARMword phys_pc;
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ARMword phys_pc;
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ARMword Reg_usr[2];
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ARMword Reg_usr[2];
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ARMword Reg_svc[2]; /* R13_SVC R14_SVC */
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ARMword Reg_svc[2]; /* R13_SVC R14_SVC */
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ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */
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ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */
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ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */
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ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */
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ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */
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ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */
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ARMword Reg_firq[7]; /* R8---R14 FIRQ */
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ARMword Reg_firq[7]; /* R8---R14 FIRQ */
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ARMword Spsr[7]; /* the exception psr's */
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ARMword Spsr[7]; /* the exception psr's */
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ARMword Mode; /* the current mode */
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ARMword Mode; /* the current mode */
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ARMword Bank; /* the current register bank */
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ARMword Bank; /* the current register bank */
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ARMword exclusive_tag;
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ARMword exclusive_tag;
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ARMword exclusive_state;
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ARMword exclusive_state;
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ARMword exclusive_result;
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ARMword exclusive_result;
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ARMword servaddr;
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ARMword servaddr;
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unsigned NextInstr;
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unsigned NextInstr;
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unsigned VectorCatch; /* caught exception mask */
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unsigned VectorCatch; /* caught exception mask */
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unsigned CallDebug; /* set to call the debugger */
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unsigned CallDebug; /* set to call the debugger */
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unsigned CanWatch; /* set by memory interface if its willing to suffer the
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unsigned CanWatch; /* set by memory interface if its willing to suffer the
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overhead of checking for watchpoints on each memory
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overhead of checking for watchpoints on each memory
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access */
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access */
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unsigned int StopHandle;
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unsigned int StopHandle;
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char *CommandLine; /* Command Line from ARMsd */
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char *CommandLine; /* Command Line from ARMsd */
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ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */
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ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */
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ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */
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ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */
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ARMul_LDCs *LDC[16]; /* LDC instruction */
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ARMul_LDCs *LDC[16]; /* LDC instruction */
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ARMul_STCs *STC[16]; /* STC instruction */
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ARMul_STCs *STC[16]; /* STC instruction */
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ARMul_MRCs *MRC[16]; /* MRC instruction */
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ARMul_MRCs *MRC[16]; /* MRC instruction */
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ARMul_MCRs *MCR[16]; /* MCR instruction */
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ARMul_MCRs *MCR[16]; /* MCR instruction */
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ARMul_MRRCs *MRRC[16]; /* MRRC instruction */
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ARMul_MRRCs *MRRC[16]; /* MRRC instruction */
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ARMul_MCRRs *MCRR[16]; /* MCRR instruction */
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ARMul_MCRRs *MCRR[16]; /* MCRR instruction */
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ARMul_CDPs *CDP[16]; /* CDP instruction */
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ARMul_CDPs *CDP[16]; /* CDP instruction */
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ARMul_CPReads *CPRead[16]; /* Read CP register */
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ARMul_CPReads *CPRead[16]; /* Read CP register */
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ARMul_CPWrites *CPWrite[16]; /* Write CP register */
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ARMul_CPWrites *CPWrite[16]; /* Write CP register */
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unsigned char *CPData[16]; /* Coprocessor data */
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unsigned char *CPData[16]; /* Coprocessor data */
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unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
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unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
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unsigned EventSet; /* the number of events in the queue */
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unsigned EventSet; /* the number of events in the queue */
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unsigned int Now; /* time to the nearest cycle */
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unsigned int Now; /* time to the nearest cycle */
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struct EventNode **EventPtr; /* the event list */
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struct EventNode **EventPtr; /* the event list */
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unsigned Debug; /* show instructions as they are executed */
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unsigned Debug; /* show instructions as they are executed */
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unsigned NresetSig; /* reset the processor */
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unsigned NresetSig; /* reset the processor */
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unsigned NfiqSig;
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unsigned NfiqSig;
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unsigned NirqSig;
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unsigned NirqSig;
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@ -356,12 +289,12 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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*/
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*/
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unsigned lateabtSig;
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unsigned lateabtSig;
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ARMword Vector; /* synthesize aborts in cycle modes */
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ARMword Vector; /* synthesize aborts in cycle modes */
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ARMword Aborted; /* sticky flag for aborts */
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ARMword Aborted; /* sticky flag for aborts */
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ARMword Reseted; /* sticky flag for Reset */
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ARMword Reseted; /* sticky flag for Reset */
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ARMword Inted, LastInted; /* sticky flags for interrupts */
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ARMword Inted, LastInted; /* sticky flags for interrupts */
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ARMword Base; /* extra hand for base writeback */
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ARMword Base; /* extra hand for base writeback */
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ARMword AbortAddr; /* to keep track of Prefetch aborts */
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ARMword AbortAddr; /* to keep track of Prefetch aborts */
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const struct Dbg_HostosInterface *hostif;
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const struct Dbg_HostosInterface *hostif;
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@ -378,7 +311,7 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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//chy: 2003-08-11, for different arm core type
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//chy: 2003-08-11, for different arm core type
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unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
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unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
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unsigned is_v5; /* Are we emulating a v5 architecture ? */
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unsigned is_v5; /* Are we emulating a v5 architecture ? */
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unsigned is_v5e; /* Are we emulating a v5e architecture ? */
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unsigned is_v5e; /* Are we emulating a v5e architecture ? */
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unsigned is_v6; /* Are we emulating a v6 architecture ? */
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unsigned is_v6; /* Are we emulating a v6 architecture ? */
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unsigned is_v7; /* Are we emulating a v7 architecture ? */
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unsigned is_v7; /* Are we emulating a v7 architecture ? */
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unsigned is_XScale; /* Are we emulating an XScale architecture ? */
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unsigned is_XScale; /* Are we emulating an XScale architecture ? */
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//chy 2005-09-19
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//chy 2005-09-19
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unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */
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unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */
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//chy: seems only used in xscale's CP14
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//chy: seems only used in xscale's CP14
|
||||||
unsigned int LastTime; /* Value of last call to ARMul_Time() */
|
unsigned int LastTime; /* Value of last call to ARMul_Time() */
|
||||||
ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */
|
ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */
|
||||||
|
|
||||||
|
|
||||||
//added by ksh:for handle different machs io 2004-3-5
|
//added by ksh:for handle different machs io 2004-3-5
|
||||||
ARMul_io mach_io;
|
ARMul_io mach_io;
|
||||||
|
|
||||||
/*added by ksh,2004-11-26,some energy profiling*/
|
/*added by ksh,2004-11-26,some energy profiling*/
|
||||||
ARMul_Energy energy;
|
ARMul_Energy energy;
|
||||||
|
|
||||||
//teawater add for next_dis 2004.10.27-----------------------
|
//teawater add for next_dis 2004.10.27-----------------------
|
||||||
int disassemble;
|
int disassemble;
|
||||||
//AJ2D------------------------------------------
|
|
||||||
|
|
||||||
//teawater add for arm2x86 2005.02.15-------------------------------------------
|
|
||||||
|
//teawater add for arm2x86 2005.02.15-------------------------------------------
|
||||||
u32 trap;
|
u32 trap;
|
||||||
u32 tea_break_addr;
|
u32 tea_break_addr;
|
||||||
u32 tea_break_ok;
|
u32 tea_break_ok;
|
||||||
int tea_pc;
|
int tea_pc;
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
//teawater add for arm2x86 2005.07.03-------------------------------------------
|
|
||||||
|
|
||||||
/*
|
//teawater add for arm2x86 2005.07.05-------------------------------------------
|
||||||
* 2007-01-24 removed the term-io functions by Anthony Lee,
|
|
||||||
* moved to "device/uart/skyeye_uart_stdio.c".
|
|
||||||
*/
|
|
||||||
|
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
//teawater add for arm2x86 2005.07.05-------------------------------------------
|
|
||||||
//arm_arm A2-18
|
//arm_arm A2-18
|
||||||
int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
|
int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
//teawater change for return if running tb dirty 2005.07.09---------------------
|
//teawater change for return if running tb dirty 2005.07.09---------------------
|
||||||
void *tb_now;
|
void *tb_now;
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
|
|
||||||
//teawater add for record reg value to ./reg.txt 2005.07.10---------------------
|
|
||||||
|
//teawater add for record reg value to ./reg.txt 2005.07.10---------------------
|
||||||
FILE *tea_reg_fd;
|
FILE *tea_reg_fd;
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
|
|
||||||
/*added by ksh in 2005-10-1*/
|
|
||||||
|
/*added by ksh in 2005-10-1*/
|
||||||
cpu_config_t *cpu;
|
cpu_config_t *cpu;
|
||||||
//mem_config_t *mem_bank;
|
//mem_config_t *mem_bank;
|
||||||
|
|
||||||
/* added LPC remap function */
|
/* added LPC remap function */
|
||||||
int vector_remap_flag;
|
int vector_remap_flag;
|
||||||
u32 vector_remap_addr;
|
u32 vector_remap_addr;
|
||||||
u32 vector_remap_size;
|
u32 vector_remap_size;
|
||||||
|
@ -486,17 +411,14 @@ typedef ARMul_State arm_core_t;
|
||||||
#define ARM_Debug_Prop 0x10
|
#define ARM_Debug_Prop 0x10
|
||||||
#define ARM_Isync_Prop ARM_Debug_Prop
|
#define ARM_Isync_Prop ARM_Debug_Prop
|
||||||
#define ARM_Lock_Prop 0x20
|
#define ARM_Lock_Prop 0x20
|
||||||
//chy 2003-08-11
|
|
||||||
#define ARM_v4_Prop 0x40
|
#define ARM_v4_Prop 0x40
|
||||||
#define ARM_v5_Prop 0x80
|
#define ARM_v5_Prop 0x80
|
||||||
/*jeff.du 2010-08-05 */
|
|
||||||
#define ARM_v6_Prop 0xc0
|
#define ARM_v6_Prop 0xc0
|
||||||
|
|
||||||
#define ARM_v5e_Prop 0x100
|
#define ARM_v5e_Prop 0x100
|
||||||
#define ARM_XScale_Prop 0x200
|
#define ARM_XScale_Prop 0x200
|
||||||
#define ARM_ep9312_Prop 0x400
|
#define ARM_ep9312_Prop 0x400
|
||||||
#define ARM_iWMMXt_Prop 0x800
|
#define ARM_iWMMXt_Prop 0x800
|
||||||
//chy 2005-09-19
|
|
||||||
#define ARM_PXA27X_Prop 0x1000
|
#define ARM_PXA27X_Prop 0x1000
|
||||||
#define ARM_v7_Prop 0x2000
|
#define ARM_v7_Prop 0x2000
|
||||||
|
|
||||||
|
@ -591,47 +513,44 @@ typedef ARMul_State arm_core_t;
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
extern void ARMul_EmulateInit (void);
|
extern void ARMul_EmulateInit();
|
||||||
extern void ARMul_Reset (ARMul_State * state);
|
extern void ARMul_Reset(ARMul_State* state);
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
extern ARMul_State *ARMul_NewState (ARMul_State * state);
|
extern ARMul_State *ARMul_NewState(ARMul_State* state);
|
||||||
extern ARMword ARMul_DoProg (ARMul_State * state);
|
extern ARMword ARMul_DoProg(ARMul_State* state);
|
||||||
extern ARMword ARMul_DoInstr (ARMul_State * state);
|
extern ARMword ARMul_DoInstr(ARMul_State* state);
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
* Definitons of things for event handling *
|
* Definitons of things for event handling *
|
||||||
\***************************************************************************/
|
\***************************************************************************/
|
||||||
|
|
||||||
extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay,
|
extern void ARMul_ScheduleEvent(ARMul_State* state, unsigned int delay, unsigned(*func) ());
|
||||||
unsigned (*func) ());
|
extern void ARMul_EnvokeEvent(ARMul_State* state);
|
||||||
extern void ARMul_EnvokeEvent (ARMul_State * state);
|
extern unsigned int ARMul_Time(ARMul_State* state);
|
||||||
extern unsigned int ARMul_Time (ARMul_State * state);
|
|
||||||
|
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
* Useful support routines *
|
* Useful support routines *
|
||||||
\***************************************************************************/
|
\***************************************************************************/
|
||||||
|
|
||||||
extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode,
|
extern ARMword ARMul_GetReg (ARMul_State* state, unsigned mode, unsigned reg);
|
||||||
unsigned reg);
|
extern void ARMul_SetReg (ARMul_State* state, unsigned mode, unsigned reg, ARMword value);
|
||||||
extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg,
|
extern ARMword ARMul_GetPC(ARMul_State* state);
|
||||||
ARMword value);
|
extern ARMword ARMul_GetNextPC(ARMul_State* state);
|
||||||
extern ARMword ARMul_GetPC (ARMul_State * state);
|
extern void ARMul_SetPC(ARMul_State* state, ARMword value);
|
||||||
extern ARMword ARMul_GetNextPC (ARMul_State * state);
|
extern ARMword ARMul_GetR15(ARMul_State* state);
|
||||||
extern void ARMul_SetPC (ARMul_State * state, ARMword value);
|
extern void ARMul_SetR15(ARMul_State* state, ARMword value);
|
||||||
extern ARMword ARMul_GetR15 (ARMul_State * state);
|
|
||||||
extern void ARMul_SetR15 (ARMul_State * state, ARMword value);
|
|
||||||
|
|
||||||
extern ARMword ARMul_GetCPSR (ARMul_State * state);
|
extern ARMword ARMul_GetCPSR(ARMul_State* state);
|
||||||
extern void ARMul_SetCPSR (ARMul_State * state, ARMword value);
|
extern void ARMul_SetCPSR(ARMul_State* state, ARMword value);
|
||||||
extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
|
extern ARMword ARMul_GetSPSR(ARMul_State* state, ARMword mode);
|
||||||
extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);
|
extern void ARMul_SetSPSR(ARMul_State* state, ARMword mode, ARMword value);
|
||||||
|
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
* Definitons of things to handle aborts *
|
* Definitons of things to handle aborts *
|
||||||
\***************************************************************************/
|
\***************************************************************************/
|
||||||
|
|
||||||
extern void ARMul_Abort (ARMul_State * state, ARMword address);
|
extern void ARMul_Abort(ARMul_State* state, ARMword address);
|
||||||
#ifdef MODET
|
#ifdef MODET
|
||||||
#define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */
|
#define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */
|
||||||
#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
|
#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
|
||||||
|
@ -649,54 +568,40 @@ extern void ARMul_Abort (ARMul_State * state, ARMword address);
|
||||||
* Definitons of things in the memory interface *
|
* Definitons of things in the memory interface *
|
||||||
\***************************************************************************/
|
\***************************************************************************/
|
||||||
|
|
||||||
extern unsigned ARMul_MemoryInit (ARMul_State * state,
|
extern unsigned ARMul_MemoryInit(ARMul_State* state, unsigned int initmemsize);
|
||||||
unsigned int initmemsize);
|
extern void ARMul_MemoryExit(ARMul_State* state);
|
||||||
extern void ARMul_MemoryExit (ARMul_State * state);
|
|
||||||
|
|
||||||
extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address,
|
extern ARMword ARMul_LoadInstrS(ARMul_State* state, ARMword address, ARMword isize);
|
||||||
ARMword isize);
|
extern ARMword ARMul_LoadInstrN(ARMul_State* state, ARMword address, ARMword isize);
|
||||||
extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address,
|
|
||||||
ARMword isize);
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address,
|
extern ARMword ARMul_ReLoadInstr(ARMul_State* state, ARMword address, ARMword isize);
|
||||||
ARMword isize);
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address);
|
extern ARMword ARMul_LoadWordS(ARMul_State* state, ARMword address);
|
||||||
extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address);
|
extern ARMword ARMul_LoadWordN(ARMul_State* state, ARMword address);
|
||||||
extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address);
|
extern ARMword ARMul_LoadHalfWord(ARMul_State* state, ARMword address);
|
||||||
extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address);
|
extern ARMword ARMul_LoadByte(ARMul_State* state, ARMword address);
|
||||||
|
|
||||||
extern void ARMul_StoreWordS (ARMul_State * state, ARMword address,
|
extern void ARMul_StoreWordS(ARMul_State* state, ARMword address, ARMword data);
|
||||||
ARMword data);
|
extern void ARMul_StoreWordN(ARMul_State* state, ARMword address, ARMword data);
|
||||||
extern void ARMul_StoreWordN (ARMul_State * state, ARMword address,
|
extern void ARMul_StoreHalfWord(ARMul_State* state, ARMword address, ARMword data);
|
||||||
ARMword data);
|
extern void ARMul_StoreByte(ARMul_State* state, ARMword address, ARMword data);
|
||||||
extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address,
|
|
||||||
ARMword data);
|
|
||||||
extern void ARMul_StoreByte (ARMul_State * state, ARMword address,
|
|
||||||
ARMword data);
|
|
||||||
|
|
||||||
extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address,
|
extern ARMword ARMul_SwapWord(ARMul_State* state, ARMword address, ARMword data);
|
||||||
ARMword data);
|
extern ARMword ARMul_SwapByte(ARMul_State* state, ARMword address, ARMword data);
|
||||||
extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address,
|
|
||||||
ARMword data);
|
|
||||||
|
|
||||||
extern void ARMul_Icycles (ARMul_State * state, unsigned number,
|
extern void ARMul_Icycles(ARMul_State* state, unsigned number, ARMword address);
|
||||||
ARMword address);
|
extern void ARMul_Ccycles(ARMul_State* state, unsigned number, ARMword address);
|
||||||
extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
|
|
||||||
ARMword address);
|
|
||||||
|
|
||||||
extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
|
extern ARMword ARMul_ReadWord(ARMul_State* state, ARMword address);
|
||||||
extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
|
extern ARMword ARMul_ReadByte(ARMul_State* state, ARMword address);
|
||||||
extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
|
extern void ARMul_WriteWord(ARMul_State* state, ARMword address, ARMword data);
|
||||||
ARMword data);
|
extern void ARMul_WriteByte(ARMul_State* state, ARMword address, ARMword data);
|
||||||
extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
|
|
||||||
ARMword data);
|
|
||||||
|
|
||||||
extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
|
extern ARMword ARMul_MemAccess(ARMul_State* state, ARMword, ARMword,
|
||||||
ARMword, ARMword, ARMword, ARMword, ARMword,
|
ARMword, ARMword, ARMword, ARMword, ARMword,
|
||||||
ARMword, ARMword, ARMword);
|
ARMword, ARMword, ARMword);
|
||||||
|
|
||||||
|
@ -739,66 +644,40 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
|
||||||
#define ARMul_CP15_DBCON_E1 0x000c
|
#define ARMul_CP15_DBCON_E1 0x000c
|
||||||
#define ARMul_CP15_DBCON_E0 0x0003
|
#define ARMul_CP15_DBCON_E0 0x0003
|
||||||
|
|
||||||
extern unsigned ARMul_CoProInit (ARMul_State * state);
|
extern unsigned ARMul_CoProInit(ARMul_State* state);
|
||||||
extern void ARMul_CoProExit (ARMul_State * state);
|
extern void ARMul_CoProExit(ARMul_State* state);
|
||||||
extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
|
extern void ARMul_CoProAttach (ARMul_State* state, unsigned number,
|
||||||
ARMul_CPInits * init, ARMul_CPExits * exit,
|
ARMul_CPInits* init, ARMul_CPExits* exit,
|
||||||
ARMul_LDCs * ldc, ARMul_STCs * stc,
|
ARMul_LDCs* ldc, ARMul_STCs* stc,
|
||||||
ARMul_MRCs * mrc, ARMul_MCRs * mcr,
|
ARMul_MRCs* mrc, ARMul_MCRs* mcr,
|
||||||
ARMul_MRRCs * mrrc, ARMul_MCRRs * mcrr,
|
ARMul_MRRCs* mrrc, ARMul_MCRRs* mcrr,
|
||||||
ARMul_CDPs * cdp,
|
ARMul_CDPs* cdp,
|
||||||
ARMul_CPReads * read, ARMul_CPWrites * write);
|
ARMul_CPReads* read, ARMul_CPWrites* write);
|
||||||
extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);
|
extern void ARMul_CoProDetach(ARMul_State* state, unsigned number);
|
||||||
|
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
* Definitons of things in the host environment *
|
* Definitons of things in the host environment *
|
||||||
\***************************************************************************/
|
\***************************************************************************/
|
||||||
|
|
||||||
extern unsigned ARMul_OSInit (ARMul_State * state);
|
extern unsigned ARMul_OSInit(ARMul_State* state);
|
||||||
extern void ARMul_OSExit (ARMul_State * state);
|
extern void ARMul_OSExit(ARMul_State* state);
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
|
extern unsigned ARMul_OSHandleSWI(ARMul_State* state, ARMword number);
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
|
extern ARMword ARMul_OSLastErrorP(ARMul_State* state);
|
||||||
|
|
||||||
extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
|
extern ARMword ARMul_Debug(ARMul_State* state, ARMword pc, ARMword instr);
|
||||||
extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
|
extern unsigned ARMul_OSException(ARMul_State* state, ARMword vector, ARMword pc);
|
||||||
ARMword pc);
|
|
||||||
extern int rdi_log;
|
extern int rdi_log;
|
||||||
|
|
||||||
/***************************************************************************\
|
|
||||||
* Host-dependent stuff *
|
|
||||||
\***************************************************************************/
|
|
||||||
|
|
||||||
#ifdef macintosh
|
|
||||||
pascal void SpinCursor (short increment); /* copied from CursorCtl.h */
|
|
||||||
# define HOURGLASS SpinCursor( 1 )
|
|
||||||
# define HOURGLASS_RATE 1023 /* 2^n - 1 */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
//teawater add for arm2x86 2005.02.14-------------------------------------------
|
|
||||||
/*ywc 2005-03-31*/
|
|
||||||
/*
|
|
||||||
#include "arm2x86.h"
|
|
||||||
#include "arm2x86_dp.h"
|
|
||||||
#include "arm2x86_movl.h"
|
|
||||||
#include "arm2x86_psr.h"
|
|
||||||
#include "arm2x86_shift.h"
|
|
||||||
#include "arm2x86_mem.h"
|
|
||||||
#include "arm2x86_mul.h"
|
|
||||||
#include "arm2x86_test.h"
|
|
||||||
#include "arm2x86_other.h"
|
|
||||||
#include "list.h"
|
|
||||||
#include "tb.h"
|
|
||||||
*/
|
|
||||||
enum ConditionCode {
|
enum ConditionCode {
|
||||||
EQ = 0,
|
EQ = 0,
|
||||||
NE = 1,
|
NE = 1,
|
||||||
|
@ -851,32 +730,16 @@ enum ConditionCode {
|
||||||
#define ZBIT_SHIFT 30
|
#define ZBIT_SHIFT 30
|
||||||
#define CBIT_SHIFT 29
|
#define CBIT_SHIFT 29
|
||||||
#define VBIT_SHIFT 28
|
#define VBIT_SHIFT 28
|
||||||
#ifdef DBCT
|
|
||||||
//teawater change for local tb branch directly jump 2005.10.18------------------
|
|
||||||
#include "dbct/list.h"
|
|
||||||
#include "dbct/arm2x86.h"
|
|
||||||
#include "dbct/arm2x86_dp.h"
|
|
||||||
#include "dbct/arm2x86_movl.h"
|
|
||||||
#include "dbct/arm2x86_psr.h"
|
|
||||||
#include "dbct/arm2x86_shift.h"
|
|
||||||
#include "dbct/arm2x86_mem.h"
|
|
||||||
#include "dbct/arm2x86_mul.h"
|
|
||||||
#include "dbct/arm2x86_test.h"
|
|
||||||
#include "dbct/arm2x86_other.h"
|
|
||||||
#include "dbct/arm2x86_coproc.h"
|
|
||||||
#include "dbct/tb.h"
|
|
||||||
#endif
|
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
//AJ2D--------------------------------------------------------------------------
|
|
||||||
#define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\
|
#define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\
|
||||||
state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \
|
state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \
|
||||||
state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \
|
state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \
|
||||||
state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \
|
state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \
|
||||||
state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \
|
state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \
|
||||||
state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\
|
state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\
|
||||||
state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\
|
state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\
|
||||||
state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\
|
state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\
|
||||||
state->temp,state->loaded,state->decoded);}
|
state->temp,state->loaded,state->decoded);}
|
||||||
|
|
||||||
#define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\
|
#define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\
|
||||||
RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
|
RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
|
||||||
|
@ -914,17 +777,17 @@ RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\
|
||||||
|
|
||||||
#define SA1110 0x6901b110
|
#define SA1110 0x6901b110
|
||||||
#define SA1100 0x4401a100
|
#define SA1100 0x4401a100
|
||||||
#define PXA250 0x69052100
|
#define PXA250 0x69052100
|
||||||
#define PXA270 0x69054110
|
#define PXA270 0x69054110
|
||||||
//#define PXA250 0x69052903
|
//#define PXA250 0x69052903
|
||||||
// 0x69052903; //PXA250 B1 from intel 278522-001.pdf
|
// 0x69052903; //PXA250 B1 from intel 278522-001.pdf
|
||||||
|
|
||||||
|
|
||||||
extern void ARMul_UndefInstr (ARMul_State *, ARMword);
|
extern void ARMul_UndefInstr(ARMul_State*, ARMword);
|
||||||
extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword);
|
extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword);
|
||||||
extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword);
|
extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword);
|
||||||
extern void ARMul_ConsolePrint (ARMul_State *, const char *, ...);
|
extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...);
|
||||||
extern void ARMul_SelectProcessor (ARMul_State *, unsigned);
|
extern void ARMul_SelectProcessor(ARMul_State*, unsigned);
|
||||||
|
|
||||||
#define DIFF_LOG 0
|
#define DIFF_LOG 0
|
||||||
#define SAVE_LOG 0
|
#define SAVE_LOG 0
|
||||||
|
|
Reference in New Issue