video_core: Reduce nihstro includes in headers. (#6626)
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3faddd5e03
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03dbdfc12f
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@ -16,6 +16,7 @@
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namespace OpenGL::ShaderDecompiler {
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using nihstro::DestRegister;
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using nihstro::Instruction;
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using nihstro::OpCode;
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using nihstro::RegisterType;
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@ -12,7 +12,6 @@
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#include <boost/serialization/access.hpp>
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#include <boost/serialization/array.hpp>
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#include <boost/serialization/base_object.hpp>
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#include <nihstro/shader_bytecode.h>
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#include "common/assert.h"
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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@ -22,10 +21,6 @@
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#include "video_core/regs_rasterizer.h"
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#include "video_core/regs_shader.h"
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using nihstro::DestRegister;
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using nihstro::RegisterType;
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using nihstro::SourceRegister;
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namespace Pica::Shader {
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constexpr unsigned MAX_PROGRAM_CODE_LENGTH = 4096;
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@ -164,36 +159,19 @@ struct UnitState {
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GSEmitter* emitter_ptr;
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static std::size_t InputOffset(const SourceRegister& reg) {
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switch (reg.GetRegisterType()) {
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case RegisterType::Input:
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return offsetof(UnitState, registers.input) +
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reg.GetIndex() * sizeof(Common::Vec4<float24>);
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case RegisterType::Temporary:
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return offsetof(UnitState, registers.temporary) +
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reg.GetIndex() * sizeof(Common::Vec4<float24>);
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default:
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UNREACHABLE();
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return 0;
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}
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static std::size_t InputOffset(int register_index) {
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return offsetof(UnitState, registers.input) +
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register_index * sizeof(Common::Vec4<float24>);
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}
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static std::size_t OutputOffset(const DestRegister& reg) {
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switch (reg.GetRegisterType()) {
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case RegisterType::Output:
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return offsetof(UnitState, registers.output) +
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reg.GetIndex() * sizeof(Common::Vec4<float24>);
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static std::size_t OutputOffset(int register_index) {
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return offsetof(UnitState, registers.output) +
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register_index * sizeof(Common::Vec4<float24>);
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}
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case RegisterType::Temporary:
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return offsetof(UnitState, registers.temporary) +
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reg.GetIndex() * sizeof(Common::Vec4<float24>);
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default:
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UNREACHABLE();
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return 0;
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}
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static std::size_t TemporaryOffset(int register_index) {
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return offsetof(UnitState, registers.temporary) +
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register_index * sizeof(Common::Vec4<float24>);
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}
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/**
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@ -29,6 +29,9 @@ using Xbyak::Reg32;
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using Xbyak::Reg64;
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using Xbyak::Xmm;
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using nihstro::DestRegister;
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using nihstro::RegisterType;
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namespace Pica::Shader {
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typedef void (JitShader::*JitFunction)(Instruction instr);
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@ -185,13 +188,22 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe
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Xmm dest) {
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Reg64 src_ptr;
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std::size_t src_offset;
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if (src_reg.GetRegisterType() == RegisterType::FloatUniform) {
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switch (src_reg.GetRegisterType()) {
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case RegisterType::FloatUniform:
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src_ptr = UNIFORMS;
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src_offset = Uniforms::GetFloatUniformOffset(src_reg.GetIndex());
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} else {
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break;
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case RegisterType::Input:
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src_ptr = STATE;
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src_offset = UnitState::InputOffset(src_reg);
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src_offset = UnitState::InputOffset(src_reg.GetIndex());
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break;
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case RegisterType::Temporary:
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src_ptr = STATE;
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src_offset = UnitState::TemporaryOffset(src_reg.GetIndex());
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break;
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default:
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UNREACHABLE_MSG("Encountered unknown source register type: {}", src_reg.GetRegisterType());
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break;
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}
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int src_offset_disp = (int)src_offset;
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@ -270,7 +282,19 @@ void JitShader::Compile_DestEnable(Instruction instr, Xmm src) {
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SwizzlePattern swiz = {(*swizzle_data)[operand_desc_id]};
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std::size_t dest_offset_disp = UnitState::OutputOffset(dest);
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std::size_t dest_offset_disp;
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switch (dest.GetRegisterType()) {
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case RegisterType::Output:
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dest_offset_disp = UnitState::OutputOffset(dest.GetIndex());
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break;
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case RegisterType::Temporary:
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dest_offset_disp = UnitState::TemporaryOffset(dest.GetIndex());
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break;
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default:
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UNREACHABLE_MSG("Encountered unknown destination register type: {}",
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dest.GetRegisterType());
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break;
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}
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// If all components are enabled, write the result to the destination register
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if (swiz.dest_mask == NO_DEST_REG_MASK) {
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@ -20,6 +20,7 @@
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using nihstro::Instruction;
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using nihstro::OpCode;
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using nihstro::SourceRegister;
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using nihstro::SwizzlePattern;
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namespace Pica::Shader {
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