Merge pull request #1893 from archshift/interpreter-split
Split huge interpreter source file into translation info and interpreter (+ some tiny misc style fixes)
This commit is contained in:
Mat M
commit
7139e6353f
|
|
@ -5,6 +5,7 @@ set(SRCS
|
|||
arm/dyncom/arm_dyncom_dec.cpp
|
||||
arm/dyncom/arm_dyncom_interpreter.cpp
|
||||
arm/dyncom/arm_dyncom_thumb.cpp
|
||||
arm/dyncom/arm_dyncom_trans.cpp
|
||||
arm/skyeye_common/armstate.cpp
|
||||
arm/skyeye_common/armsupp.cpp
|
||||
arm/skyeye_common/vfp/vfp.cpp
|
||||
|
|
@ -140,6 +141,7 @@ set(HEADERS
|
|||
arm/dyncom/arm_dyncom_interpreter.h
|
||||
arm/dyncom/arm_dyncom_run.h
|
||||
arm/dyncom/arm_dyncom_thumb.h
|
||||
arm/dyncom/arm_dyncom_trans.h
|
||||
arm/skyeye_common/arm_regformat.h
|
||||
arm/skyeye_common/armstate.h
|
||||
arm/skyeye_common/armsupp.h
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,492 @@
|
|||
struct ARMul_State;
|
||||
typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper);
|
||||
|
||||
enum class TransExtData {
|
||||
COND = (1 << 0),
|
||||
NON_BRANCH = (1 << 1),
|
||||
DIRECT_BRANCH = (1 << 2),
|
||||
INDIRECT_BRANCH = (1 << 3),
|
||||
CALL = (1 << 4),
|
||||
RET = (1 << 5),
|
||||
END_OF_PAGE = (1 << 6),
|
||||
THUMB = (1 << 7),
|
||||
SINGLE_STEP = (1 << 8)
|
||||
};
|
||||
|
||||
struct arm_inst {
|
||||
unsigned int idx;
|
||||
unsigned int cond;
|
||||
TransExtData br;
|
||||
char component[0];
|
||||
};
|
||||
|
||||
struct generic_arm_inst {
|
||||
u32 Ra;
|
||||
u32 Rm;
|
||||
u32 Rn;
|
||||
u32 Rd;
|
||||
u8 op1;
|
||||
u8 op2;
|
||||
};
|
||||
|
||||
struct adc_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct add_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct orr_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct and_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct eor_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct bbl_inst {
|
||||
unsigned int L;
|
||||
int signed_immed_24;
|
||||
unsigned int next_addr;
|
||||
unsigned int jmp_addr;
|
||||
};
|
||||
|
||||
struct bx_inst {
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct blx_inst {
|
||||
union {
|
||||
s32 signed_immed_24;
|
||||
u32 Rm;
|
||||
} val;
|
||||
unsigned int inst;
|
||||
};
|
||||
|
||||
struct clz_inst {
|
||||
unsigned int Rm;
|
||||
unsigned int Rd;
|
||||
};
|
||||
|
||||
struct cps_inst {
|
||||
unsigned int imod0;
|
||||
unsigned int imod1;
|
||||
unsigned int mmod;
|
||||
unsigned int A, I, F;
|
||||
unsigned int mode;
|
||||
};
|
||||
|
||||
struct clrex_inst {
|
||||
};
|
||||
|
||||
struct cpy_inst {
|
||||
unsigned int Rm;
|
||||
unsigned int Rd;
|
||||
};
|
||||
|
||||
struct bic_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct sub_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct tst_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct cmn_inst {
|
||||
unsigned int I;
|
||||
unsigned int Rn;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct teq_inst {
|
||||
unsigned int I;
|
||||
unsigned int Rn;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct stm_inst {
|
||||
unsigned int inst;
|
||||
};
|
||||
|
||||
struct bkpt_inst {
|
||||
u32 imm;
|
||||
};
|
||||
|
||||
struct stc_inst {
|
||||
};
|
||||
|
||||
struct ldc_inst {
|
||||
};
|
||||
|
||||
struct swi_inst {
|
||||
unsigned int num;
|
||||
};
|
||||
|
||||
struct cmp_inst {
|
||||
unsigned int I;
|
||||
unsigned int Rn;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct mov_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct mvn_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct rev_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rm;
|
||||
unsigned int op1;
|
||||
unsigned int op2;
|
||||
};
|
||||
|
||||
struct rsb_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct rsc_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct sbc_inst {
|
||||
unsigned int I;
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int shifter_operand;
|
||||
shtop_fp_t shtop_func;
|
||||
};
|
||||
|
||||
struct mul_inst {
|
||||
unsigned int S;
|
||||
unsigned int Rd;
|
||||
unsigned int Rs;
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct smul_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rs;
|
||||
unsigned int Rm;
|
||||
unsigned int x;
|
||||
unsigned int y;
|
||||
};
|
||||
|
||||
struct umull_inst {
|
||||
unsigned int S;
|
||||
unsigned int RdHi;
|
||||
unsigned int RdLo;
|
||||
unsigned int Rs;
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct smlad_inst {
|
||||
unsigned int m;
|
||||
unsigned int Rm;
|
||||
unsigned int Rd;
|
||||
unsigned int Ra;
|
||||
unsigned int Rn;
|
||||
unsigned int op1;
|
||||
unsigned int op2;
|
||||
};
|
||||
|
||||
struct smla_inst {
|
||||
unsigned int x;
|
||||
unsigned int y;
|
||||
unsigned int Rm;
|
||||
unsigned int Rd;
|
||||
unsigned int Rs;
|
||||
unsigned int Rn;
|
||||
};
|
||||
|
||||
struct smlalxy_inst {
|
||||
unsigned int x;
|
||||
unsigned int y;
|
||||
unsigned int RdLo;
|
||||
unsigned int RdHi;
|
||||
unsigned int Rm;
|
||||
unsigned int Rn;
|
||||
};
|
||||
|
||||
struct ssat_inst {
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int imm5;
|
||||
unsigned int sat_imm;
|
||||
unsigned int shift_type;
|
||||
};
|
||||
|
||||
struct umaal_inst {
|
||||
unsigned int Rn;
|
||||
unsigned int Rm;
|
||||
unsigned int RdHi;
|
||||
unsigned int RdLo;
|
||||
};
|
||||
|
||||
struct umlal_inst {
|
||||
unsigned int S;
|
||||
unsigned int Rm;
|
||||
unsigned int Rs;
|
||||
unsigned int RdHi;
|
||||
unsigned int RdLo;
|
||||
};
|
||||
|
||||
struct smlal_inst {
|
||||
unsigned int S;
|
||||
unsigned int Rm;
|
||||
unsigned int Rs;
|
||||
unsigned int RdHi;
|
||||
unsigned int RdLo;
|
||||
};
|
||||
|
||||
struct smlald_inst {
|
||||
unsigned int RdLo;
|
||||
unsigned int RdHi;
|
||||
unsigned int Rm;
|
||||
unsigned int Rn;
|
||||
unsigned int swap;
|
||||
unsigned int op1;
|
||||
unsigned int op2;
|
||||
};
|
||||
|
||||
struct mla_inst {
|
||||
unsigned int S;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int Rs;
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct mrc_inst {
|
||||
unsigned int opcode_1;
|
||||
unsigned int opcode_2;
|
||||
unsigned int cp_num;
|
||||
unsigned int crn;
|
||||
unsigned int crm;
|
||||
unsigned int Rd;
|
||||
unsigned int inst;
|
||||
};
|
||||
|
||||
struct mcr_inst {
|
||||
unsigned int opcode_1;
|
||||
unsigned int opcode_2;
|
||||
unsigned int cp_num;
|
||||
unsigned int crn;
|
||||
unsigned int crm;
|
||||
unsigned int Rd;
|
||||
unsigned int inst;
|
||||
};
|
||||
|
||||
struct mcrr_inst {
|
||||
unsigned int opcode_1;
|
||||
unsigned int cp_num;
|
||||
unsigned int crm;
|
||||
unsigned int rt;
|
||||
unsigned int rt2;
|
||||
};
|
||||
|
||||
struct mrs_inst {
|
||||
unsigned int R;
|
||||
unsigned int Rd;
|
||||
};
|
||||
|
||||
struct msr_inst {
|
||||
unsigned int field_mask;
|
||||
unsigned int R;
|
||||
unsigned int inst;
|
||||
};
|
||||
|
||||
struct pld_inst {
|
||||
};
|
||||
|
||||
struct sxtb_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rm;
|
||||
unsigned int rotate;
|
||||
};
|
||||
|
||||
struct sxtab_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rn;
|
||||
unsigned int Rm;
|
||||
unsigned rotate;
|
||||
};
|
||||
|
||||
struct sxtah_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rn;
|
||||
unsigned int Rm;
|
||||
unsigned int rotate;
|
||||
};
|
||||
|
||||
struct sxth_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rm;
|
||||
unsigned int rotate;
|
||||
};
|
||||
|
||||
struct uxtab_inst {
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int rotate;
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct uxtah_inst {
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int rotate;
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct uxth_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rm;
|
||||
unsigned int rotate;
|
||||
};
|
||||
|
||||
struct cdp_inst {
|
||||
unsigned int opcode_1;
|
||||
unsigned int CRn;
|
||||
unsigned int CRd;
|
||||
unsigned int cp_num;
|
||||
unsigned int opcode_2;
|
||||
unsigned int CRm;
|
||||
unsigned int inst;
|
||||
};
|
||||
|
||||
struct uxtb_inst {
|
||||
unsigned int Rd;
|
||||
unsigned int Rm;
|
||||
unsigned int rotate;
|
||||
};
|
||||
|
||||
struct swp_inst {
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned int Rm;
|
||||
};
|
||||
|
||||
struct setend_inst {
|
||||
unsigned int set_bigend;
|
||||
};
|
||||
|
||||
struct b_2_thumb {
|
||||
unsigned int imm;
|
||||
};
|
||||
struct b_cond_thumb {
|
||||
unsigned int imm;
|
||||
unsigned int cond;
|
||||
};
|
||||
|
||||
struct bl_1_thumb {
|
||||
unsigned int imm;
|
||||
};
|
||||
struct bl_2_thumb {
|
||||
unsigned int imm;
|
||||
};
|
||||
struct blx_1_thumb {
|
||||
unsigned int imm;
|
||||
unsigned int instr;
|
||||
};
|
||||
|
||||
struct pkh_inst {
|
||||
unsigned int Rm;
|
||||
unsigned int Rn;
|
||||
unsigned int Rd;
|
||||
unsigned char imm;
|
||||
};
|
||||
|
||||
#define VFP_INTERPRETER_STRUCT
|
||||
#include "core/arm/skyeye_common/vfp/vfpinstr.cpp"
|
||||
#undef VFP_INTERPRETER_STRUCT
|
||||
|
||||
typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr);
|
||||
|
||||
struct ldst_inst {
|
||||
unsigned int inst;
|
||||
get_addr_fp_t get_addr;
|
||||
};
|
||||
|
||||
typedef arm_inst* ARM_INST_PTR;
|
||||
typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int);
|
||||
|
||||
extern const transop_fp_t arm_instruction_trans[];
|
||||
extern const size_t arm_instruction_trans_len;
|
||||
|
||||
#define TRANS_CACHE_SIZE (64 * 1024 * 2000)
|
||||
extern char trans_cache_buf[TRANS_CACHE_SIZE];
|
||||
extern size_t trans_cache_buf_top;
|
||||
|
|
@ -26,7 +26,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -75,7 +75,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -124,7 +124,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -174,7 +174,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -223,7 +223,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -272,7 +272,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -321,7 +321,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -370,7 +370,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -419,7 +419,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -470,7 +470,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
|
||||
|
|
@ -518,7 +518,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
|
||||
|
|
@ -560,7 +560,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -610,7 +610,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -659,7 +659,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -708,7 +708,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -757,7 +757,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -806,7 +806,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -857,7 +857,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -906,7 +906,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->dp_operation = BIT(inst, 8);
|
||||
inst_cream->instr = inst;
|
||||
|
|
@ -962,7 +962,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->to_arm = BIT(inst, 20) == 1;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
|
|
@ -1006,7 +1006,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->reg = BITS(inst, 16, 19);
|
||||
inst_cream->Rt = BITS(inst, 12, 15);
|
||||
|
|
@ -1069,7 +1069,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
|
|
@ -1115,7 +1115,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->reg = BITS(inst, 16, 19);
|
||||
inst_cream->Rt = BITS(inst, 12, 15);
|
||||
|
|
@ -1200,7 +1200,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
|
|
@ -1253,7 +1253,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int inde
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->to_arm = BIT(inst, 20) == 1;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
|
|
@ -1301,7 +1301,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->to_arm = BIT(inst, 20) == 1;
|
||||
inst_cream->t = BITS(inst, 12, 15);
|
||||
|
|
@ -1354,7 +1354,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
|
|
@ -1420,7 +1420,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4);
|
||||
|
|
@ -1495,7 +1495,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
|
|
@ -1580,7 +1580,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4));
|
||||
|
|
@ -1653,7 +1653,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
|
|
@ -1722,7 +1722,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index)
|
|||
|
||||
inst_base->cond = BITS(inst, 28, 31);
|
||||
inst_base->idx = index;
|
||||
inst_base->br = NON_BRANCH;
|
||||
inst_base->br = TransExtData::NON_BRANCH;
|
||||
|
||||
inst_cream->single = BIT(inst, 8) == 0;
|
||||
inst_cream->add = BIT(inst, 23);
|
||||
|
|
|
|||
Reference in New Issue