citra-emu
/
citra
Archived
1
0
Fork 0
Code

added some commented out ARMulator functions

This commit is contained in:
bunnei 2014-04-03 22:06:42 -04:00
parent 829952834a
commit c2d4c7d4f4
1 changed files with 3 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/core/src/core.cpp
View File

@ -26,6 +26,7 @@
#include "core.h" #include "core.h"
#include "mem_map.h" #include "mem_map.h"
#include "arm/armdefs.h" #include "arm/armdefs.h"
#include "arm/armemu.h"
#include "arm/disassembler/arm_disasm.h" #include "arm/disassembler/arm_disasm.h"
namespace Core { namespace Core {
@ -54,31 +55,13 @@ void RunLoop() {
/// Step the CPU one instruction /// Step the CPU one instruction
void SingleStep() { void SingleStep() {
//arm11_core_t* core = (arm11_core_t*)opaque->obj;
ARMul_State *state = core->state; ARMul_State *state = core->state;
//if (state->space.conf_obj == NULL){
// state->space.conf_obj = core->space->conf_obj;
// state->space.read = core->space->read;
// state->space.write = core->space->write;
//}
char next_instr[255];
disasm->disasm(state->pc, Memory::Read32(state->pc), next_instr);
NOTICE_LOG(ARM11, "0x%08X : %s", state->pc, next_instr);
for (int i = 0; i < 15; i++) {
NOTICE_LOG(ARM11, "Reg[%02d] = 0x%08X", i, state->Reg[i]);
}
state->step++; state->step++;
state->cycle++; state->cycle++;
state->EndCondition = 0; state->EndCondition = 0;
state->stop_simulator = 0; state->stop_simulator = 0;
//state->NextInstr = RESUME; /* treat as PC change */ state->NextInstr = RESUME; /* treat as PC change */
state->last_pc = state->Reg[15]; state->last_pc = state->Reg[15];
state->Reg[15] = ARMul_DoInstr(state); state->Reg[15] = ARMul_DoInstr(state);
state->Cpsr = (state->Cpsr & 0x0fffffdf) | \ state->Cpsr = (state->Cpsr & 0x0fffffdf) | \
@ -88,7 +71,7 @@ void SingleStep() {
(state->VFlag << 28);// | \ (state->VFlag << 28);// | \
//(state->TFlag << 5); //(state->TFlag << 5);
//FLUSHPIPE; FLUSHPIPE;
} }
/// Halt the core /// Halt the core