dyncom: Fix ADC overflow flag setting
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b33380ca59
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d2a05bbbc6
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@ -4005,10 +4005,14 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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{
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adc_inst *inst_cream = (adc_inst *)inst_base->component;
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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lop = RN;
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unsigned int sht_op = SHIFTER_OPERAND;
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rop = SHIFTER_OPERAND + cpu->CFlag;
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RD = dst = lop + rop;
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u32 left = RN;
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u32 right = SHIFTER_OPERAND;
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u64 unsigned_sum = (left + right + cpu->CFlag);
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s64 signed_sum = (s64)(s32)left + (s64)(s32)right + (s64)cpu->CFlag;
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u32 result = (unsigned_sum & 0xFFFFFFFF);
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RD = result;
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (CurrentModeHasSPSR) {
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cpu->Cpsr = cpu->Spsr_copy;
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@ -4016,10 +4020,10 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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LOAD_NZCVT;
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}
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} else if (inst_cream->S) {
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UPDATE_NFLAG(dst);
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UPDATE_ZFLAG(dst);
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UPDATE_CFLAG_CARRY_FROM_ADD(lop, sht_op, cpu->CFlag);
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UPDATE_VFLAG((int)dst, (int)lop, (int)rop);
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UPDATE_NFLAG(result);
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UPDATE_ZFLAG(result);
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UPDATE_CFLAG_CARRY_FROM_ADD(left, right, cpu->CFlag);
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cpu->VFlag = ((s64)(s32)result != signed_sum);
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}
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if (inst_cream->Rd == 15) {
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INC_PC(sizeof(adc_inst));
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