2019-04-27 05:07:18 +00:00
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// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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2019-06-08 15:25:11 +00:00
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#include <vector>
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#include <fmt/format.h>
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2019-04-27 05:07:18 +00:00
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#include "common/assert.h"
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2019-06-08 15:25:11 +00:00
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#include "common/bit_field.h"
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2019-04-27 05:07:18 +00:00
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#include "common/common_types.h"
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2019-06-08 15:25:11 +00:00
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#include "common/logging/log.h"
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2019-04-27 05:07:18 +00:00
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#include "video_core/engines/shader_bytecode.h"
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2019-06-08 15:25:11 +00:00
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#include "video_core/shader/node_helper.h"
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2019-04-27 05:07:18 +00:00
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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namespace {
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std::size_t GetImageTypeNumCoordinates(Tegra::Shader::ImageType image_type) {
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switch (image_type) {
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case Tegra::Shader::ImageType::Texture1D:
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case Tegra::Shader::ImageType::TextureBuffer:
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return 1;
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case Tegra::Shader::ImageType::Texture1DArray:
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case Tegra::Shader::ImageType::Texture2D:
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return 2;
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case Tegra::Shader::ImageType::Texture2DArray:
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case Tegra::Shader::ImageType::Texture3D:
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return 3;
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}
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UNREACHABLE();
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return 1;
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}
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} // Anonymous namespace
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u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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2019-09-18 04:07:01 +00:00
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const auto GetCoordinates = [this, instr](Tegra::Shader::ImageType image_type) {
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std::vector<Node> coords;
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const std::size_t num_coords{GetImageTypeNumCoordinates(image_type)};
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coords.reserve(num_coords);
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for (std::size_t i = 0; i < num_coords; ++i) {
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coords.push_back(GetRegister(instr.gpr8.Value() + i));
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}
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return coords;
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};
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switch (opcode->get().GetId()) {
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case OpCode::Id::SULD: {
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UNIMPLEMENTED_IF(instr.suldst.mode != Tegra::Shader::SurfaceDataMode::P);
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UNIMPLEMENTED_IF(instr.suldst.out_of_bounds_store !=
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Tegra::Shader::OutOfBoundsStore::Ignore);
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const auto type{instr.suldst.image_type};
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auto& image{instr.suldst.is_immediate ? GetImage(instr.image, type)
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: GetBindlessImage(instr.gpr39, type)};
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image.MarkRead();
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u32 indexer = 0;
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for (u32 element = 0; element < 4; ++element) {
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if (!instr.suldst.IsComponentEnabled(element)) {
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continue;
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}
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MetaImage meta{image, {}, element};
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Node value = Operation(OperationCode::ImageLoad, meta, GetCoordinates(type));
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SetTemporary(bb, indexer++, std::move(value));
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}
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for (u32 i = 0; i < indexer; ++i) {
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporary(i));
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}
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break;
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}
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case OpCode::Id::SUST: {
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UNIMPLEMENTED_IF(instr.suldst.mode != Tegra::Shader::SurfaceDataMode::P);
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UNIMPLEMENTED_IF(instr.suldst.out_of_bounds_store !=
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Tegra::Shader::OutOfBoundsStore::Ignore);
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UNIMPLEMENTED_IF(instr.suldst.component_mask_selector != 0xf); // Ensure we have RGBA
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std::vector<Node> values;
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constexpr std::size_t hardcoded_size{4};
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for (std::size_t i = 0; i < hardcoded_size; ++i) {
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values.push_back(GetRegister(instr.gpr0.Value() + i));
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}
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const auto type{instr.suldst.image_type};
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auto& image{instr.suldst.is_immediate ? GetImage(instr.image, type)
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: GetBindlessImage(instr.gpr39, type)};
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image.MarkWrite();
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MetaImage meta{image, std::move(values)};
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bb.push_back(Operation(OperationCode::ImageStore, meta, GetCoordinates(type)));
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break;
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}
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case OpCode::Id::SUATOM: {
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UNIMPLEMENTED_IF(instr.suatom_d.is_ba != 0);
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const OperationCode operation_code = [instr] {
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switch (instr.suatom_d.operation_type) {
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case Tegra::Shader::ImageAtomicOperationType::S32:
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case Tegra::Shader::ImageAtomicOperationType::U32:
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switch (instr.suatom_d.operation) {
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case Tegra::Shader::ImageAtomicOperation::Add:
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return OperationCode::AtomicImageAdd;
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case Tegra::Shader::ImageAtomicOperation::And:
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return OperationCode::AtomicImageAnd;
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case Tegra::Shader::ImageAtomicOperation::Or:
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return OperationCode::AtomicImageOr;
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case Tegra::Shader::ImageAtomicOperation::Xor:
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return OperationCode::AtomicImageXor;
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case Tegra::Shader::ImageAtomicOperation::Exch:
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return OperationCode::AtomicImageExchange;
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}
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default:
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break;
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}
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UNIMPLEMENTED_MSG("Unimplemented operation={} type={}",
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static_cast<u64>(instr.suatom_d.operation.Value()),
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static_cast<u64>(instr.suatom_d.operation_type.Value()));
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return OperationCode::AtomicImageAdd;
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}();
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Node value = GetRegister(instr.gpr0);
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const auto type = instr.suatom_d.image_type;
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auto& image = GetImage(instr.image, type);
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image.MarkAtomic();
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MetaImage meta{image, {std::move(value)}};
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SetRegister(bb, instr.gpr0, Operation(operation_code, meta, GetCoordinates(type)));
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled image instruction: {}", opcode->get().GetName());
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}
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return pc;
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}
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2019-09-18 04:50:40 +00:00
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Image& ShaderIR::GetImage(Tegra::Shader::Image image, Tegra::Shader::ImageType type) {
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const auto offset = static_cast<u32>(image.index.Value());
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const auto it =
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std::find_if(std::begin(used_images), std::end(used_images),
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[offset](const Image& entry) { return entry.GetOffset() == offset; });
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if (it != std::end(used_images)) {
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ASSERT(!it->IsBindless() && it->GetType() == it->GetType());
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return *it;
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2019-04-27 05:07:18 +00:00
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}
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2019-10-28 05:31:05 +00:00
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const auto next_index = static_cast<u32>(used_images.size());
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return used_images.emplace_back(next_index, offset, type);
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}
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2019-09-18 04:50:40 +00:00
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Image& ShaderIR::GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type) {
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const Node image_register = GetRegister(reg);
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const auto [base_image, buffer, offset] =
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TrackCbuf(image_register, global_code, static_cast<s64>(global_code.size()));
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const auto it =
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std::find_if(std::begin(used_images), std::end(used_images),
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[buffer = buffer, offset = offset](const Image& entry) {
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return entry.GetBuffer() == buffer && entry.GetOffset() == offset;
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});
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if (it != std::end(used_images)) {
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ASSERT(it->IsBindless() && it->GetType() == it->GetType());
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return *it;
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}
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2019-10-28 05:31:05 +00:00
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const auto next_index = static_cast<u32>(used_images.size());
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return used_images.emplace_back(next_index, offset, buffer, type);
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2019-07-18 00:03:53 +00:00
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}
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2019-04-27 05:07:18 +00:00
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} // namespace VideoCommon::Shader
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