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pica: shader_dirty if texture2 coord changed

This commit is contained in:
wwylele 2017-05-05 15:29:35 +03:00
parent 0f664ef89d
commit 039b293092
5 changed files with 12 additions and 7 deletions

View File

@ -93,7 +93,7 @@ ASSERT_REG_POSITION(rasterizer.viewport_corner, 0x68);
ASSERT_REG_POSITION(rasterizer.depthmap_enable, 0x6D); ASSERT_REG_POSITION(rasterizer.depthmap_enable, 0x6D);
ASSERT_REG_POSITION(texturing, 0x80); ASSERT_REG_POSITION(texturing, 0x80);
ASSERT_REG_POSITION(texturing.texture0_enable, 0x80); ASSERT_REG_POSITION(texturing.main_config, 0x80);
ASSERT_REG_POSITION(texturing.texture0, 0x81); ASSERT_REG_POSITION(texturing.texture0, 0x81);
ASSERT_REG_POSITION(texturing.texture0_format, 0x8e); ASSERT_REG_POSITION(texturing.texture0_format, 0x8e);
ASSERT_REG_POSITION(texturing.fragment_lighting_enable, 0x8f); ASSERT_REG_POSITION(texturing.fragment_lighting_enable, 0x8f);

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@ -126,7 +126,7 @@ struct TexturingRegs {
BitField<10, 1, u32> texture3_enable; // TODO: unimplemented BitField<10, 1, u32> texture3_enable; // TODO: unimplemented
BitField<13, 1, u32> texture2_use_coord1; BitField<13, 1, u32> texture2_use_coord1;
BitField<16, 1, u32> clear_texture_cache; // TODO: unimplemented BitField<16, 1, u32> clear_texture_cache; // TODO: unimplemented
}; } main_config;
TextureConfig texture0; TextureConfig texture0;
INSERT_PADDING_WORDS(0x8); INSERT_PADDING_WORDS(0x8);
BitField<0, 4, TextureFormat> texture0_format; BitField<0, 4, TextureFormat> texture0_format;
@ -146,9 +146,9 @@ struct TexturingRegs {
}; };
const std::array<FullTextureConfig, 3> GetTextures() const { const std::array<FullTextureConfig, 3> GetTextures() const {
return {{ return {{
{texture0_enable.ToBool(), texture0, texture0_format}, {main_config.texture0_enable.ToBool(), texture0, texture0_format},
{texture1_enable.ToBool(), texture1, texture1_format}, {main_config.texture1_enable.ToBool(), texture1, texture1_format},
{texture2_enable.ToBool(), texture2, texture2_format}, {main_config.texture2_enable.ToBool(), texture2, texture2_format},
}}; }};
} }

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@ -402,6 +402,10 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
SyncLogicOp(); SyncLogicOp();
break; break;
case PICA_REG_INDEX(texturing.main_config):
shader_dirty = true;
break;
// Texture 0 type // Texture 0 type
case PICA_REG_INDEX(texturing.texture0.type): case PICA_REG_INDEX(texturing.texture0.type):
shader_dirty = true; shader_dirty = true;

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@ -40,7 +40,7 @@ PicaShaderConfig PicaShaderConfig::BuildFromRegs(const Pica::Regs& regs) {
state.texture0_type = regs.texturing.texture0.type; state.texture0_type = regs.texturing.texture0.type;
state.texture2_use_coord1 = regs.texturing.texture2_use_coord1 != 0; state.texture2_use_coord1 = regs.texturing.main_config.texture2_use_coord1 != 0;
// Copy relevant tev stages fields. // Copy relevant tev stages fields.
// We don't sync const_color here because of the high variance, it is a // We don't sync const_color here because of the high variance, it is a

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@ -276,7 +276,8 @@ static void ProcessTriangleInternal(const Vertex& v0, const Vertex& v1, const Ve
DEBUG_ASSERT(0 != texture.config.address); DEBUG_ASSERT(0 != texture.config.address);
int coordinate_i = (i == 2 && regs.texturing.texture2_use_coord1) ? 1 : i; int coordinate_i =
(i == 2 && regs.texturing.main_config.texture2_use_coord1) ? 1 : i;
float24 u = uv[coordinate_i].u(); float24 u = uv[coordinate_i].u();
float24 v = uv[coordinate_i].v(); float24 v = uv[coordinate_i].v();