shader: Add coarse derivatives
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04c459fc8d
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080857b60e
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@ -533,4 +533,8 @@ Id EmitDPdxFine(EmitContext& ctx, Id op_a);
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Id EmitDPdyFine(EmitContext& ctx, Id op_a);
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Id EmitDPdyFine(EmitContext& ctx, Id op_a);
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Id EmitDPdxCoarse(EmitContext& ctx, Id op_a);
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Id EmitDPdyCoarse(EmitContext& ctx, Id op_a);
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} // namespace Shader::Backend::SPIRV
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} // namespace Shader::Backend::SPIRV
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@ -191,4 +191,12 @@ Id EmitDPdyFine(EmitContext& ctx, Id op_a) {
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return ctx.OpDPdyFine(ctx.F32[1], op_a);
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return ctx.OpDPdyFine(ctx.F32[1], op_a);
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}
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}
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Id EmitDPdxCoarse(EmitContext& ctx, Id op_a) {
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return ctx.OpDPdxCoarse(ctx.F32[1], op_a);
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}
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Id EmitDPdyCoarse(EmitContext& ctx, Id op_a) {
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return ctx.OpDPdyCoarse(ctx.F32[1], op_a);
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}
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} // namespace Shader::Backend::SPIRV
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} // namespace Shader::Backend::SPIRV
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@ -1933,4 +1933,12 @@ F32 IREmitter::DPdyFine(const F32& a) {
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return Inst<F32>(Opcode::DPdyFine, a);
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return Inst<F32>(Opcode::DPdyFine, a);
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}
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}
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F32 IREmitter::DPdxCoarse(const F32& a) {
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return Inst<F32>(Opcode::DPdxCoarse, a);
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}
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F32 IREmitter::DPdyCoarse(const F32& a) {
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return Inst<F32>(Opcode::DPdyCoarse, a);
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}
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} // namespace Shader::IR
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} // namespace Shader::IR
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@ -357,6 +357,10 @@ public:
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[[nodiscard]] F32 DPdyFine(const F32& a);
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[[nodiscard]] F32 DPdyFine(const F32& a);
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[[nodiscard]] F32 DPdxCoarse(const F32& a);
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[[nodiscard]] F32 DPdyCoarse(const F32& a);
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private:
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private:
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IR::Block::iterator insertion_point;
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IR::Block::iterator insertion_point;
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@ -513,3 +513,5 @@ OPCODE(ShuffleButterfly, U32, U32,
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OPCODE(FSwizzleAdd, F32, F32, F32, U32, )
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OPCODE(FSwizzleAdd, F32, F32, F32, U32, )
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OPCODE(DPdxFine, F32, F32, )
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OPCODE(DPdxFine, F32, F32, )
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OPCODE(DPdyFine, F32, F32, )
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OPCODE(DPdyFine, F32, F32, )
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OPCODE(DPdxCoarse, F32, F32, )
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OPCODE(DPdyCoarse, F32, F32, )
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@ -532,6 +532,8 @@ void VisitUsages(Info& info, IR::Inst& inst) {
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break;
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break;
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case IR::Opcode::DPdxFine:
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case IR::Opcode::DPdxFine:
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case IR::Opcode::DPdyFine:
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case IR::Opcode::DPdyFine:
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case IR::Opcode::DPdxCoarse:
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case IR::Opcode::DPdyCoarse:
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info.uses_derivates = true;
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info.uses_derivates = true;
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break;
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break;
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case IR::Opcode::LoadStorageU8:
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case IR::Opcode::LoadStorageU8:
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@ -428,19 +428,15 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
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if (!swizzle.IsImmediate()) {
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if (!swizzle.IsImmediate()) {
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return;
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return;
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}
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}
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const IR::Value value_1{GetThroughCast(inst.Arg(0).Resolve(), IR::Opcode::BitCastF32U32)};
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const IR::Value value_1{GetThroughCast(inst.Arg(0).Resolve(), IR::Opcode::BitCastF32U32)};
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const IR::Value value_2{GetThroughCast(inst.Arg(1).Resolve(), IR::Opcode::BitCastF32U32)};
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const IR::Value value_2{GetThroughCast(inst.Arg(1).Resolve(), IR::Opcode::BitCastF32U32)};
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if (value_1.IsImmediate()) {
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if (value_1.IsImmediate()) {
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return;
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return;
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}
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}
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const u32 swizzle_value{swizzle.U32()};
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const u32 swizzle_value{swizzle.U32()};
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if (swizzle_value != 0x99 && swizzle_value != 0xA5) {
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if (swizzle_value != 0x99 && swizzle_value != 0xA5) {
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return;
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return;
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}
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}
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IR::Inst* const inst2{value_1.InstRecursive()};
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IR::Inst* const inst2{value_1.InstRecursive()};
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if (inst2->GetOpcode() != IR::Opcode::ShuffleButterfly) {
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if (inst2->GetOpcode() != IR::Opcode::ShuffleButterfly) {
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return;
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return;
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@ -449,19 +445,15 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
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if (value_2 != value_3) {
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if (value_2 != value_3) {
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return;
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return;
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}
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}
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const IR::Value index{inst2->Arg(1)};
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const IR::Value index{inst2->Arg(1)};
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const IR::Value clamp{inst2->Arg(2)};
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const IR::Value clamp{inst2->Arg(2)};
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const IR::Value segmentation_mask{inst2->Arg(3)};
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const IR::Value segmentation_mask{inst2->Arg(3)};
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if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
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if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
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return;
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return;
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}
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}
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if (clamp.U32() != 3 || segmentation_mask.U32() != 28) {
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if (clamp.U32() != 3 || segmentation_mask.U32() != 28) {
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return;
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return;
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}
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}
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if (swizzle_value == 0x99) {
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if (swizzle_value == 0x99) {
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// DPdxFine
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// DPdxFine
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if (index.U32() == 1) {
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if (index.U32() == 1) {
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