- reenabled MCR and MRC functions now that VFP is attached
- removed HLE::CallMCR function (was pointless)
This commit is contained in:
bunnei
parent
a2804bf701
commit
145a91f21f
|
|
@ -17,9 +17,9 @@
|
|||
#ifndef __ARMEMU_H__
|
||||
#define __ARMEMU_H__
|
||||
|
||||
#include "common/common.h"
|
||||
#include "armdefs.h"
|
||||
//#include "skyeye.h"
|
||||
|
||||
#include "core/arm/interpreter/skyeye_defs.h"
|
||||
#include "core/arm/interpreter/armdefs.h"
|
||||
|
||||
extern ARMword isize;
|
||||
|
||||
|
|
@ -73,9 +73,7 @@ extern ARMword isize;
|
|||
#define ASSIGNT(res) state->TFlag = res
|
||||
#define INSN_SIZE (TFLAG ? 2 : 4)
|
||||
#else
|
||||
#define TBIT (1L << 5)
|
||||
#define INSN_SIZE 4
|
||||
#define TFLAG 0
|
||||
#endif
|
||||
|
||||
/*add armv6 CPSR feature*/
|
||||
|
|
@ -166,6 +164,7 @@ extern ARMword isize;
|
|||
#define PCWRAP(pc) ((pc) & R15PCBITS)
|
||||
#endif
|
||||
|
||||
#define PC (state->Reg[15] & PCMASK)
|
||||
#define R15CCINTMODE (state->Reg[15] & (CCBITS | R15INTBITS | R15MODEBITS))
|
||||
#define R15INT (state->Reg[15] & R15INTBITS)
|
||||
#define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
|
||||
|
|
@ -180,11 +179,11 @@ extern ARMword isize;
|
|||
#define ER15INT (IFFLAGS << 26)
|
||||
#define EMODE (state->Mode)
|
||||
|
||||
//#ifdef MODET
|
||||
//#define CPSR (ECC | EINT | EMODE | (TFLAG << 5))
|
||||
//#else
|
||||
//#define CPSR (ECC | EINT | EMODE)
|
||||
//#endif
|
||||
#ifdef MODET
|
||||
#define CPSR (ECC | EINT | EMODE | (TFLAG << 5))
|
||||
#else
|
||||
#define CPSR (ECC | EINT | EMODE)
|
||||
#endif
|
||||
|
||||
#ifdef MODE32
|
||||
#define PATCHR15
|
||||
|
|
@ -240,12 +239,12 @@ extern ARMword isize;
|
|||
} \
|
||||
while (0)
|
||||
|
||||
//#ifndef MODE32
|
||||
#ifndef MODE32
|
||||
#define VECTORS 0x20
|
||||
#define LEGALADDR 0x03ffffff
|
||||
#define VECTORACCESS(address) (address < VECTORS && ARMul_MODE26BIT && state->prog32Sig)
|
||||
#define ADDREXCEPT(address) (address > LEGALADDR && !state->data32Sig)
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
#define INTERNALABORT(address) \
|
||||
do \
|
||||
|
|
@ -421,9 +420,9 @@ extern ARMword isize;
|
|||
|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
|
||||
*/
|
||||
#define CP_ACCESS_ALLOWED(STATE, CP) \
|
||||
(((CP) >= 14) \
|
||||
|| (!(STATE)->is_XScale) \
|
||||
|| (xscale_cp15_cp_access_allowed(STATE, 15, CP)))
|
||||
( ((CP) >= 14) \
|
||||
|| (! (STATE)->is_XScale) \
|
||||
|| (xscale_cp15_cp_access_allowed(STATE,15,CP)))
|
||||
|
||||
/* Macro to rotate n right by b bits. */
|
||||
#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
|
||||
|
|
@ -515,7 +514,7 @@ tdstate;
|
|||
* out-of-updated with the newer ISA.
|
||||
* -- Michael.Kang
|
||||
********************************************************************************/
|
||||
#define UNDEF_WARNING ERROR_LOG(ARM11, "undefined or unpredicted behavior for arm instruction.\n");
|
||||
#define UNDEF_WARNING WARN_LOG(ARM11, "undefined or unpredicted behavior for arm instruction.\n");
|
||||
|
||||
/* Macros to scrutinize instructions. */
|
||||
#define UNDEF_Test UNDEF_WARNING
|
||||
|
|
|
|||
|
|
@ -15,11 +15,9 @@
|
|||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
|
||||
|
||||
#include "armdefs.h"
|
||||
#include "armemu.h"
|
||||
|
||||
//#include "ansidecl.h"
|
||||
#include "skyeye_defs.h"
|
||||
#include "core/arm/interpreter/armdefs.h"
|
||||
#include "core/arm/interpreter/armemu.h"
|
||||
#include "core/arm/interpreter/skyeye_defs.h"
|
||||
#include "core/hle/coprocessor.h"
|
||||
#include "core/arm/disassembler/arm_disasm.h"
|
||||
|
||||
|
|
@ -127,8 +125,7 @@ ARMul_GetCPSR (ARMul_State * state)
|
|||
{
|
||||
//chy 2003-08-20: below is from gdb20030716, maybe isn't suitable for system simulator
|
||||
//return (CPSR | state->Cpsr); for gdb20030716
|
||||
// NOTE(bunnei): Changed this from [now] commented out macro "CPSR"
|
||||
return ((ECC | EINT | EMODE | (TFLAG << 5))); //had be tested in old skyeye with gdb5.0-5.3
|
||||
return (CPSR); //had be tested in old skyeye with gdb5.0-5.3
|
||||
}
|
||||
|
||||
/* This routine sets the value of the CPSR. */
|
||||
|
|
@ -145,7 +142,7 @@ ARMul_SetCPSR (ARMul_State * state, ARMword value)
|
|||
|
||||
void
|
||||
ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs)
|
||||
{
|
||||
{
|
||||
state->Cpsr = ARMul_GetCPSR (state);
|
||||
//chy 2006-02-16 , should not consider system mode, don't conside 26bit mode
|
||||
if (state->Mode != USER26MODE && state->Mode != USER32MODE ) {
|
||||
|
|
@ -500,8 +497,8 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
|
|||
return;
|
||||
}
|
||||
|
||||
if (ADDREXCEPT (address))
|
||||
INTERNALABORT (address);
|
||||
//if (ADDREXCEPT (address))
|
||||
// INTERNALABORT (address);
|
||||
|
||||
cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0);
|
||||
while (cpab == ARMul_BUSY) {
|
||||
|
|
@ -594,8 +591,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||
return;
|
||||
}
|
||||
|
||||
if (ADDREXCEPT (address) || VECTORACCESS (address))
|
||||
INTERNALABORT (address);
|
||||
//if (ADDREXCEPT (address) || VECTORACCESS (address))
|
||||
// INTERNALABORT (address);
|
||||
|
||||
cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data);
|
||||
while (cpab == ARMul_BUSY) {
|
||||
|
|
@ -661,40 +658,39 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
|
|||
void
|
||||
ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
|
||||
{
|
||||
HLE::CallMCR(instr, source);
|
||||
//unsigned cpab;
|
||||
unsigned cpab;
|
||||
|
||||
////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
|
||||
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||
// //chy 2004-07-19 should fix in the future ????!!!!
|
||||
// //printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
|
||||
// ARMul_UndefInstr (state, instr);
|
||||
// return;
|
||||
//}
|
||||
//printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
|
||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||
//chy 2004-07-19 should fix in the future ????!!!!
|
||||
//printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
|
||||
ARMul_UndefInstr (state, instr);
|
||||
return;
|
||||
}
|
||||
|
||||
//cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
|
||||
cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
|
||||
|
||||
//while (cpab == ARMul_BUSY) {
|
||||
// ARMul_Icycles (state, 1, 0);
|
||||
while (cpab == ARMul_BUSY) {
|
||||
ARMul_Icycles (state, 1, 0);
|
||||
|
||||
// if (IntPending (state)) {
|
||||
// cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
|
||||
// instr, 0);
|
||||
// return;
|
||||
// }
|
||||
// else
|
||||
// cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
|
||||
// source);
|
||||
//}
|
||||
if (IntPending (state)) {
|
||||
cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
|
||||
instr, 0);
|
||||
return;
|
||||
}
|
||||
else
|
||||
cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
|
||||
source);
|
||||
}
|
||||
|
||||
//if (cpab == ARMul_CANT) {
|
||||
// printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
|
||||
// ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||
//}
|
||||
//else {
|
||||
// BUSUSEDINCPCN;
|
||||
// ARMul_Ccycles (state, 1, 0);
|
||||
//}
|
||||
if (cpab == ARMul_CANT) {
|
||||
printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
|
||||
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||
}
|
||||
else {
|
||||
BUSUSEDINCPCN;
|
||||
ARMul_Ccycles (state, 1, 0);
|
||||
}
|
||||
}
|
||||
|
||||
/* This function does the Busy-Waiting for an MCRR instruction. */
|
||||
|
|
@ -742,37 +738,41 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
|
|||
|
||||
ARMword result = HLE::CallMRC(instr);
|
||||
|
||||
////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
|
||||
//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||
// //chy 2004-07-19 should fix in the future????!!!!
|
||||
// //printf("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n",CPNum, instr);
|
||||
// ARMul_UndefInstr (state, instr);
|
||||
// return -1;
|
||||
//}
|
||||
if (result != -1) {
|
||||
return result;
|
||||
}
|
||||
|
||||
//cpab = (state->MRC[CPNum]) (state, ARMul_FIRST, instr, &result);
|
||||
//while (cpab == ARMul_BUSY) {
|
||||
// ARMul_Icycles (state, 1, 0);
|
||||
// if (IntPending (state)) {
|
||||
// cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT,
|
||||
// instr, 0);
|
||||
// return (0);
|
||||
// }
|
||||
// else
|
||||
// cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr,
|
||||
// &result);
|
||||
//}
|
||||
//if (cpab == ARMul_CANT) {
|
||||
// printf ("SKYEYE ARMul_MRC,CANT UndefInstr CPnum is %x, instr %x\n", CPNum, instr);
|
||||
// ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||
// /* Parent will destroy the flags otherwise. */
|
||||
// result = ECC;
|
||||
//}
|
||||
//else {
|
||||
// BUSUSEDINCPCN;
|
||||
// ARMul_Ccycles (state, 1, 0);
|
||||
// ARMul_Icycles (state, 1, 0);
|
||||
//}
|
||||
//printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
|
||||
if (!CP_ACCESS_ALLOWED (state, CPNum)) {
|
||||
//chy 2004-07-19 should fix in the future????!!!!
|
||||
//printf("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n",CPNum, instr);
|
||||
ARMul_UndefInstr (state, instr);
|
||||
return -1;
|
||||
}
|
||||
|
||||
cpab = (state->MRC[CPNum]) (state, ARMul_FIRST, instr, &result);
|
||||
while (cpab == ARMul_BUSY) {
|
||||
ARMul_Icycles (state, 1, 0);
|
||||
if (IntPending (state)) {
|
||||
cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT,
|
||||
instr, 0);
|
||||
return (0);
|
||||
}
|
||||
else
|
||||
cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr,
|
||||
&result);
|
||||
}
|
||||
if (cpab == ARMul_CANT) {
|
||||
printf ("SKYEYE ARMul_MRC,CANT UndefInstr CPnum is %x, instr %x\n", CPNum, instr);
|
||||
ARMul_Abort (state, ARMul_UndefinedInstrV);
|
||||
/* Parent will destroy the flags otherwise. */
|
||||
result = ECC;
|
||||
}
|
||||
else {
|
||||
BUSUSEDINCPCN;
|
||||
ARMul_Ccycles (state, 1, 0);
|
||||
ARMul_Icycles (state, 1, 0);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
|
@ -907,9 +907,7 @@ ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay,
|
|||
state->Now = ARMul_Time (state);
|
||||
when = (state->Now + delay) % EVENTLISTSIZE;
|
||||
event = (struct EventNode *) malloc (sizeof (struct EventNode));
|
||||
|
||||
_dbg_assert_msg_(ARM11, event, "SKYEYE:ARMul_ScheduleEvent: malloc event error\n");
|
||||
|
||||
event->func = what;
|
||||
event->next = *(state->EventPtr + when);
|
||||
*(state->EventPtr + when) = event;
|
||||
|
|
|
|||
|
|
@ -9,42 +9,26 @@
|
|||
|
||||
namespace HLE {
|
||||
|
||||
/// Data synchronization barrier
|
||||
u32 DataSynchronizationBarrier() {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/// Returns the coprocessor (in this case, syscore) command buffer pointer
|
||||
Addr GetThreadCommandBuffer() {
|
||||
// Called on insruction: mrc p15, 0, r0, c13, c0, 3
|
||||
return Memory::KERNEL_MEMORY_VADDR;
|
||||
}
|
||||
|
||||
/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
|
||||
s32 CallMCR(u32 instruction, u32 value) {
|
||||
CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
|
||||
ERROR_LOG(OSHLE, "unimplemented MCR instruction=0x%08X, operation=%02X, value=%08X",
|
||||
instruction, operation, value);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
|
||||
s32 CallMRC(u32 instruction) {
|
||||
CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
|
||||
|
||||
switch (operation) {
|
||||
|
||||
case DATA_SYNCHRONIZATION_BARRIER:
|
||||
return DataSynchronizationBarrier();
|
||||
|
||||
case CALL_GET_THREAD_COMMAND_BUFFER:
|
||||
return GetThreadCommandBuffer();
|
||||
|
||||
default:
|
||||
ERROR_LOG(OSHLE, "unimplemented MRC instruction 0x%08X", instruction);
|
||||
//DEBUG_LOG(OSHLE, "unknown MRC call 0x%08X", instruction);
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
return -1;
|
||||
}
|
||||
|
||||
} // namespace
|
||||
|
|
|
|||
|
|
@ -14,9 +14,6 @@ enum CoprocessorOperation {
|
|||
CALL_GET_THREAD_COMMAND_BUFFER = 0xE1,
|
||||
};
|
||||
|
||||
/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
|
||||
s32 CallMCR(u32 instruction, u32 value);
|
||||
|
||||
/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
|
||||
s32 CallMRC(u32 instruction);
|
||||
|
||||
|
|
|
|||
Reference in New Issue