GPU: Implement Flush Requests for Async mode.
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b7bc3c2549
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@ -125,6 +125,28 @@ bool GPU::CancelSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
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return true;
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}
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u64 GPU::RequestFlush(CacheAddr addr, std::size_t size) {
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std::unique_lock lck{flush_request_mutex};
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const u64 fence = ++last_flush_fence;
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flush_requests.emplace_back(fence, addr, size);
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return fence;
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}
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void GPU::TickWork() {
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std::unique_lock lck{flush_request_mutex};
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while (!flush_requests.empty()) {
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auto& request = flush_requests.front();
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const u64 fence = request.fence;
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const CacheAddr addr = request.addr;
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const std::size_t size = request.size;
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flush_requests.pop_front();
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flush_request_mutex.unlock();
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renderer->Rasterizer().FlushRegion(addr, size);
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current_flush_fence.store(fence);
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flush_request_mutex.lock();
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}
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}
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u64 GPU::GetTicks() const {
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// This values were reversed engineered by fincs from NVN
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// The gpu clock is reported in units of 385/625 nanoseconds
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@ -159,6 +159,14 @@ public:
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void SyncGuestHost();
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virtual void OnCommandListEnd();
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u64 RequestFlush(CacheAddr addr, std::size_t size);
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u64 CurrentFlushRequestFence() const {
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return current_flush_fence.load(std::memory_order_relaxed);
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}
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void TickWork();
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/// Returns a reference to the Maxwell3D GPU engine.
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Engines::Maxwell3D& Maxwell3D();
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@ -327,6 +335,19 @@ private:
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std::condition_variable sync_cv;
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struct FlushRequest {
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FlushRequest(u64 fence, CacheAddr addr, std::size_t size)
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: fence{fence}, addr{addr}, size{size} {}
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u64 fence;
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CacheAddr addr;
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std::size_t size;
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};
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std::list<FlushRequest> flush_requests;
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std::atomic<u64> current_flush_fence{};
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u64 last_flush_fence{};
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std::mutex flush_request_mutex;
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const bool is_async;
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};
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@ -15,8 +15,9 @@
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namespace VideoCommon::GPUThread {
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/// Runs the GPU thread
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static void RunThread(VideoCore::RendererBase& renderer, Core::Frontend::GraphicsContext& context,
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Tegra::DmaPusher& dma_pusher, SynchState& state) {
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static void RunThread(Core::System& system, VideoCore::RendererBase& renderer,
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Core::Frontend::GraphicsContext& context, Tegra::DmaPusher& dma_pusher,
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SynchState& state) {
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MicroProfileOnThreadCreate("GpuThread");
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// Wait for first GPU command before acquiring the window context
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@ -40,6 +41,8 @@ static void RunThread(VideoCore::RendererBase& renderer, Core::Frontend::Graphic
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renderer.SwapBuffers(data->framebuffer ? &*data->framebuffer : nullptr);
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} else if (const auto data = std::get_if<OnCommandListEndCommand>(&next.data)) {
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renderer.Rasterizer().ReleaseFences();
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} else if (const auto data = std::get_if<GPUTickCommand>(&next.data)) {
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system.GPU().TickWork();
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} else if (const auto data = std::get_if<FlushRegionCommand>(&next.data)) {
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renderer.Rasterizer().FlushRegion(data->addr, data->size);
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} else if (const auto data = std::get_if<InvalidateRegionCommand>(&next.data)) {
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@ -68,8 +71,8 @@ ThreadManager::~ThreadManager() {
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void ThreadManager::StartThread(VideoCore::RendererBase& renderer,
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Core::Frontend::GraphicsContext& context,
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Tegra::DmaPusher& dma_pusher) {
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thread = std::thread{RunThread, std::ref(renderer), std::ref(context), std::ref(dma_pusher),
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std::ref(state)};
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thread = std::thread{RunThread, std::ref(system), std::ref(renderer),
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std::ref(context), std::ref(dma_pusher), std::ref(state)};
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}
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void ThreadManager::SubmitList(Tegra::CommandList&& entries) {
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@ -85,8 +88,10 @@ void ThreadManager::FlushRegion(VAddr addr, u64 size) {
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return;
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}
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if (system.Renderer().Rasterizer().MustFlushRegion(addr, size)) {
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u64 fence = PushCommand(FlushRegionCommand(addr, size));
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while (fence > state.signaled_fence.load(std::memory_order_relaxed)) {
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auto& gpu = system.GPU();
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u64 fence = gpu.RequestFlush(addr, size);
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PushCommand(GPUTickCommand());
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while (fence > gpu.CurrentFlushRequestFence()) {
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}
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}
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}
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@ -70,12 +70,16 @@ struct FlushAndInvalidateRegionCommand final {
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u64 size;
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};
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/// Command to signal to the GPU thread that processing has ended
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/// Command called within the gpu, to schedule actions after a command list end
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struct OnCommandListEndCommand final {};
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/// Command to make the gpu look into pending requests
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struct GPUTickCommand final {};
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using CommandData =
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std::variant<EndProcessingCommand, SubmitListCommand, SwapBuffersCommand, FlushRegionCommand,
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InvalidateRegionCommand, FlushAndInvalidateRegionCommand, OnCommandListEndCommand>;
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InvalidateRegionCommand, FlushAndInvalidateRegionCommand, OnCommandListEndCommand,
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GPUTickCommand>;
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struct CommandDataContainer {
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CommandDataContainer() = default;
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@ -601,6 +601,8 @@ void RasterizerOpenGL::Draw(bool is_indexed, bool is_instanced) {
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EndTransformFeedback();
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++num_queued_commands;
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system.GPU().TickWork();
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}
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void RasterizerOpenGL::DispatchCompute(GPUVAddr code_addr) {
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@ -628,6 +630,7 @@ void RasterizerOpenGL::DispatchCompute(GPUVAddr code_addr) {
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const auto& launch_desc = system.GPU().KeplerCompute().launch_description;
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glDispatchCompute(launch_desc.grid_dim_x, launch_desc.grid_dim_y, launch_desc.grid_dim_z);
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++num_queued_commands;
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system.GPU().TickWork();
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}
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void RasterizerOpenGL::ResetCounter(VideoCore::QueryType type) {
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@ -652,6 +655,9 @@ void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) {
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}
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bool RasterizerOpenGL::MustFlushRegion(VAddr addr, u64 size) {
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if (!Settings::IsGPULevelExtreme()) {
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return buffer_cache.MustFlushRegion(addr, size);
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}
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return texture_cache.MustFlushRegion(addr, size) || buffer_cache.MustFlushRegion(addr, size);
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}
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@ -365,6 +365,8 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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});
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EndTransformFeedback();
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system.GPU().TickWork();
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}
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void RasterizerVulkan::Clear() {
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@ -492,6 +494,8 @@ void RasterizerVulkan::DispatchCompute(GPUVAddr code_addr) {
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descriptor_set, {});
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cmdbuf.Dispatch(grid_x, grid_y, grid_z);
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});
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system.GPU().TickWork();
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}
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void RasterizerVulkan::ResetCounter(VideoCore::QueryType type) {
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