memory_manager: Make GpuToCpuAddress return an optional.
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9e11a76e92
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239ac8abe2
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@ -90,9 +90,9 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params)
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}
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void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
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const VAddr head_address = memory_manager->GpuToCpuAddress(address);
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VAddr current_addr = head_address;
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while (current_addr < head_address + size * sizeof(CommandHeader)) {
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const boost::optional<VAddr> head_address = memory_manager->GpuToCpuAddress(address);
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VAddr current_addr = *head_address;
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while (current_addr < *head_address + size * sizeof(CommandHeader)) {
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const CommandHeader header = {Memory::Read32(current_addr)};
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current_addr += sizeof(u32);
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@ -145,7 +145,7 @@ void Maxwell3D::ProcessQueryGet() {
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GPUVAddr sequence_address = regs.query.QueryAddress();
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// Since the sequence address is given as a GPU VAddr, we have to convert it to an application
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// VAddr before writing.
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VAddr address = memory_manager.GpuToCpuAddress(sequence_address);
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boost::optional<VAddr> address = memory_manager.GpuToCpuAddress(sequence_address);
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// TODO(Subv): Support the other query units.
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ASSERT_MSG(regs.query.query_get.unit == Regs::QueryUnit::Crop,
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@ -153,7 +153,7 @@ void Maxwell3D::ProcessQueryGet() {
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ASSERT_MSG(regs.query.query_get.short_query,
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"Writing the entire query result structure is unimplemented");
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u32 value = Memory::Read32(address);
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u32 value = Memory::Read32(*address);
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u32 result = 0;
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// TODO(Subv): Support the other query variables
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@ -173,7 +173,7 @@ void Maxwell3D::ProcessQueryGet() {
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case Regs::QueryMode::Write2: {
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// Write the current query sequence to the sequence address.
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u32 sequence = regs.query.query_sequence;
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Memory::Write32(address, sequence);
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Memory::Write32(*address, sequence);
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// TODO(Subv): Write the proper query response structure to the address when not using short
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// mode.
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@ -225,9 +225,10 @@ void Maxwell3D::ProcessCBData(u32 value) {
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// Don't allow writing past the end of the buffer.
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ASSERT(regs.const_buffer.cb_pos + sizeof(u32) <= regs.const_buffer.cb_size);
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VAddr address = memory_manager.GpuToCpuAddress(buffer_address + regs.const_buffer.cb_pos);
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boost::optional<VAddr> address =
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memory_manager.GpuToCpuAddress(buffer_address + regs.const_buffer.cb_pos);
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Memory::Write32(address, value);
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Memory::Write32(*address, value);
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// Increment the current buffer position.
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regs.const_buffer.cb_pos = regs.const_buffer.cb_pos + 4;
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@ -237,10 +238,10 @@ Texture::TICEntry Maxwell3D::GetTICEntry(u32 tic_index) const {
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GPUVAddr tic_base_address = regs.tic.TICAddress();
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GPUVAddr tic_address_gpu = tic_base_address + tic_index * sizeof(Texture::TICEntry);
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VAddr tic_address_cpu = memory_manager.GpuToCpuAddress(tic_address_gpu);
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boost::optional<VAddr> tic_address_cpu = memory_manager.GpuToCpuAddress(tic_address_gpu);
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Texture::TICEntry tic_entry;
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Memory::ReadBlock(tic_address_cpu, &tic_entry, sizeof(Texture::TICEntry));
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Memory::ReadBlock(*tic_address_cpu, &tic_entry, sizeof(Texture::TICEntry));
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ASSERT_MSG(tic_entry.header_version == Texture::TICHeaderVersion::BlockLinear ||
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tic_entry.header_version == Texture::TICHeaderVersion::Pitch,
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@ -267,10 +268,10 @@ Texture::TSCEntry Maxwell3D::GetTSCEntry(u32 tsc_index) const {
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GPUVAddr tsc_base_address = regs.tsc.TSCAddress();
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GPUVAddr tsc_address_gpu = tsc_base_address + tsc_index * sizeof(Texture::TSCEntry);
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VAddr tsc_address_cpu = memory_manager.GpuToCpuAddress(tsc_address_gpu);
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boost::optional<VAddr> tsc_address_cpu = memory_manager.GpuToCpuAddress(tsc_address_gpu);
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Texture::TSCEntry tsc_entry;
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Memory::ReadBlock(tsc_address_cpu, &tsc_entry, sizeof(Texture::TSCEntry));
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Memory::ReadBlock(*tsc_address_cpu, &tsc_entry, sizeof(Texture::TSCEntry));
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return tsc_entry;
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}
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@ -292,7 +293,7 @@ std::vector<Texture::FullTextureInfo> Maxwell3D::GetStageTextures(Regs::ShaderSt
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current_texture < tex_info_buffer_end; current_texture += sizeof(Texture::TextureHandle)) {
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Texture::TextureHandle tex_handle{
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Memory::Read32(memory_manager.GpuToCpuAddress(current_texture))};
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Memory::Read32(*memory_manager.GpuToCpuAddress(current_texture))};
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Texture::FullTextureInfo tex_info{};
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// TODO(Subv): Use the shader to determine which textures are actually accessed.
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@ -73,9 +73,14 @@ boost::optional<GPUVAddr> MemoryManager::FindFreeBlock(u64 size, u64 align) {
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return {};
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}
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VAddr MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) {
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boost::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) {
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VAddr base_addr = PageSlot(gpu_addr);
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ASSERT(base_addr != static_cast<u64>(PageStatus::Unmapped));
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if (base_addr == static_cast<u64>(PageStatus::Allocated)) {
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return {};
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}
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return base_addr + (gpu_addr & PAGE_MASK);
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}
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@ -6,6 +6,9 @@
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#include <array>
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#include <memory>
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#include <boost/optional.hpp>
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#include "common/common_types.h"
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#include "core/memory.h"
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@ -22,7 +25,7 @@ public:
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GPUVAddr AllocateSpace(GPUVAddr gpu_addr, u64 size, u64 align);
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GPUVAddr MapBufferEx(VAddr cpu_addr, u64 size);
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GPUVAddr MapBufferEx(VAddr cpu_addr, GPUVAddr gpu_addr, u64 size);
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VAddr GpuToCpuAddress(GPUVAddr gpu_addr);
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boost::optional<VAddr> GpuToCpuAddress(GPUVAddr gpu_addr);
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static constexpr u64 PAGE_BITS = 16;
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static constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
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@ -150,7 +150,7 @@ std::pair<u8*, GLintptr> RasterizerOpenGL::SetupVertexArrays(u8* array_ptr,
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u64 size = end - start + 1;
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// Copy vertex array data
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const VAddr data_addr{memory_manager->PhysicalToVirtualAddress(start)};
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const VAddr data_addr{*memory_manager->GpuToCpuAddress(start)};
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res_cache.FlushRegion(data_addr, size, nullptr);
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Memory::ReadBlock(data_addr, array_ptr, size);
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@ -233,8 +233,8 @@ void RasterizerOpenGL::SetupShaders(u8* buffer_ptr, GLintptr buffer_offset) {
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// Fetch program code from memory
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GLShader::ProgramCode program_code;
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const u64 gpu_address{gpu.regs.code_address.CodeAddress() + shader_config.offset};
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const VAddr cpu_address{gpu.memory_manager.GpuToCpuAddress(gpu_address)};
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Memory::ReadBlock(cpu_address, program_code.data(), program_code.size() * sizeof(u64));
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const boost::optional<VAddr> cpu_address{gpu.memory_manager.GpuToCpuAddress(gpu_address)};
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Memory::ReadBlock(*cpu_address, program_code.data(), program_code.size() * sizeof(u64));
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GLShader::ShaderSetup setup{std::move(program_code)};
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GLShader::ShaderEntries shader_resources;
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@ -394,9 +394,9 @@ void RasterizerOpenGL::DrawArrays() {
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GLintptr index_buffer_offset = 0;
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if (is_indexed) {
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const auto& memory_manager = Core::System().GetInstance().GPU().memory_manager;
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const VAddr index_data_addr{
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const boost::optional<VAddr> index_data_addr{
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memory_manager->GpuToCpuAddress(regs.index_array.StartAddress())};
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Memory::ReadBlock(index_data_addr, offseted_buffer, index_buffer_size);
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Memory::ReadBlock(*index_data_addr, offseted_buffer, index_buffer_size);
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index_buffer_offset = buffer_offset;
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offseted_buffer += index_buffer_size;
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@ -659,9 +659,9 @@ u32 RasterizerOpenGL::SetupConstBuffers(Maxwell::ShaderStage stage, GLuint progr
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buffer_draw_state.enabled = true;
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buffer_draw_state.bindpoint = current_bindpoint + bindpoint;
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VAddr addr = gpu.memory_manager->GpuToCpuAddress(buffer.address);
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boost::optional<VAddr> addr = gpu.memory_manager->GpuToCpuAddress(buffer.address);
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std::vector<u8> data(used_buffer.GetSize() * sizeof(float));
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Memory::ReadBlock(addr, data.data(), data.size());
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Memory::ReadBlock(*addr, data.data(), data.size());
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glBindBuffer(GL_SHADER_STORAGE_BUFFER, buffer_draw_state.ssbo);
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glBufferData(GL_SHADER_STORAGE_BUFFER, data.size(), data.data(), GL_DYNAMIC_DRAW);
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@ -1028,7 +1028,7 @@ Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextu
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auto& gpu = Core::System::GetInstance().GPU();
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SurfaceParams params;
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params.addr = gpu.memory_manager->GpuToCpuAddress(config.tic.Address());
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params.addr = *gpu.memory_manager->GpuToCpuAddress(config.tic.Address());
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params.width = config.tic.Width();
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params.height = config.tic.Height();
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params.is_tiled = config.tic.IsTiled();
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@ -1106,7 +1106,7 @@ SurfaceSurfaceRect_Tuple RasterizerCacheOpenGL::GetFramebufferSurfaces(
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color_params.block_height = Tegra::Texture::TICEntry::DefaultBlockHeight;
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SurfaceParams depth_params = color_params;
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color_params.addr = memory_manager->GpuToCpuAddress(config.Address());
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color_params.addr = *memory_manager->GpuToCpuAddress(config.Address());
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color_params.pixel_format = SurfaceParams::PixelFormatFromRenderTargetFormat(config.format);
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color_params.component_type = SurfaceParams::ComponentTypeFromRenderTarget(config.format);
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color_params.UpdateParams();
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@ -378,10 +378,10 @@ void GraphicsSurfaceWidget::OnUpdate() {
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// TODO: Implement a good way to visualize alpha components!
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QImage decoded_image(surface_width, surface_height, QImage::Format_ARGB32);
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VAddr address = gpu.memory_manager->GpuToCpuAddress(surface_address);
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boost::optional<VAddr> address = gpu.memory_manager->GpuToCpuAddress(surface_address);
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auto unswizzled_data =
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Tegra::Texture::UnswizzleTexture(address, surface_format, surface_width, surface_height);
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Tegra::Texture::UnswizzleTexture(*address, surface_format, surface_width, surface_height);
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auto texture_data = Tegra::Texture::DecodeTexture(unswizzled_data, surface_format,
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surface_width, surface_height);
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@ -437,9 +437,9 @@ void GraphicsSurfaceWidget::SaveSurface() {
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pixmap->save(&file, "PNG");
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} else if (selectedFilter == bin_filter) {
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auto& gpu = Core::System::GetInstance().GPU();
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VAddr address = gpu.memory_manager->GpuToCpuAddress(surface_address);
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boost::optional<VAddr> address = gpu.memory_manager->GpuToCpuAddress(surface_address);
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const u8* buffer = Memory::GetPointer(address);
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const u8* buffer = Memory::GetPointer(*address);
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ASSERT_MSG(buffer != nullptr, "Memory not accessible");
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QFile file(filename);
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