gpu: Move GPUVAddr definition to common_types.
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@ -40,10 +40,9 @@ using s64 = std::int64_t; ///< 64-bit signed int
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using f32 = float; ///< 32-bit floating point
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using f64 = double; ///< 64-bit floating point
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// TODO: It would be nice to eventually replace these with strong types that prevent accidental
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// conversion between each other.
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using VAddr = u64; ///< Represents a pointer in the userspace virtual address space.
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using PAddr = u64; ///< Represents a pointer in the ARM11 physical address space.
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using VAddr = u64; ///< Represents a pointer in the userspace virtual address space.
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using PAddr = u64; ///< Represents a pointer in the ARM11 physical address space.
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using GPUVAddr = u64; ///< Represents a pointer in the GPU virtual address space.
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using u128 = std::array<std::uint64_t, 2>;
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static_assert(sizeof(u128) == 16, "u128 must be 128 bits wide");
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@ -89,7 +89,7 @@ u32 nvhost_as_gpu::Remap(const std::vector<u8>& input, std::vector<u8>& output)
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for (const auto& entry : entries) {
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LOG_WARNING(Service_NVDRV, "remap entry, offset=0x{:X} handle=0x{:X} pages=0x{:X}",
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entry.offset, entry.nvmap_handle, entry.pages);
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Tegra::GPUVAddr offset = static_cast<Tegra::GPUVAddr>(entry.offset) << 0x10;
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GPUVAddr offset = static_cast<GPUVAddr>(entry.offset) << 0x10;
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auto object = nvmap_dev->GetObject(entry.nvmap_handle);
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if (!object) {
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LOG_CRITICAL(Service_NVDRV, "nvmap {} is an invalid handle!", entry.nvmap_handle);
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@ -102,7 +102,7 @@ u32 nvhost_as_gpu::Remap(const std::vector<u8>& input, std::vector<u8>& output)
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u64 size = static_cast<u64>(entry.pages) << 0x10;
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ASSERT(size <= object->size);
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Tegra::GPUVAddr returned = gpu.MemoryManager().MapBufferEx(object->addr, offset, size);
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GPUVAddr returned = gpu.MemoryManager().MapBufferEx(object->addr, offset, size);
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ASSERT(returned == offset);
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}
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std::memcpy(output.data(), entries.data(), output.size());
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@ -13,9 +13,6 @@
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namespace Tegra {
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/// Virtual addresses in the GPU's memory map are 64 bit.
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using GPUVAddr = u64;
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class MemoryManager final {
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public:
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MemoryManager();
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@ -21,8 +21,8 @@ CachedBufferEntry::CachedBufferEntry(VAddr cpu_addr, std::size_t size, GLintptr
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OGLBufferCache::OGLBufferCache(RasterizerOpenGL& rasterizer, std::size_t size)
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: RasterizerCache{rasterizer}, stream_buffer(size, true) {}
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GLintptr OGLBufferCache::UploadMemory(Tegra::GPUVAddr gpu_addr, std::size_t size,
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std::size_t alignment, bool cache) {
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GLintptr OGLBufferCache::UploadMemory(GPUVAddr gpu_addr, std::size_t size, std::size_t alignment,
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bool cache) {
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auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
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// Cache management is a big overhead, so only cache entries with a given size.
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@ -58,7 +58,7 @@ public:
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/// Uploads data from a guest GPU address. Returns host's buffer offset where it's been
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/// allocated.
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GLintptr UploadMemory(Tegra::GPUVAddr gpu_addr, std::size_t size, std::size_t alignment = 4,
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GLintptr UploadMemory(GPUVAddr gpu_addr, std::size_t size, std::size_t alignment = 4,
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bool cache = true);
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/// Uploads from a host memory. Returns host's buffer offset where it's been allocated.
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@ -46,7 +46,7 @@ GlobalRegion GlobalRegionCacheOpenGL::TryGetReservedGlobalRegion(CacheAddr addr,
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return search->second;
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}
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GlobalRegion GlobalRegionCacheOpenGL::GetUncachedGlobalRegion(Tegra::GPUVAddr addr, u32 size,
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GlobalRegion GlobalRegionCacheOpenGL::GetUncachedGlobalRegion(GPUVAddr addr, u32 size,
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u8* host_ptr) {
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GlobalRegion region{TryGetReservedGlobalRegion(ToCacheAddr(host_ptr), size)};
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if (!region) {
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@ -66,7 +66,7 @@ public:
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private:
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GlobalRegion TryGetReservedGlobalRegion(CacheAddr addr, u32 size) const;
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GlobalRegion GetUncachedGlobalRegion(Tegra::GPUVAddr addr, u32 size, u8* host_ptr);
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GlobalRegion GetUncachedGlobalRegion(GPUVAddr addr, u32 size, u8* host_ptr);
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void ReserveGlobalRegion(GlobalRegion region);
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std::unordered_map<CacheAddr, GlobalRegion> reserve;
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@ -40,8 +40,7 @@ GLintptr PrimitiveAssembler::MakeQuadArray(u32 first, u32 count) {
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return index_offset;
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}
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GLintptr PrimitiveAssembler::MakeQuadIndexed(Tegra::GPUVAddr gpu_addr, std::size_t index_size,
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u32 count) {
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GLintptr PrimitiveAssembler::MakeQuadIndexed(GPUVAddr gpu_addr, std::size_t index_size, u32 count) {
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const std::size_t map_size{CalculateQuadSize(count)};
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auto [dst_pointer, index_offset] = buffer_cache.ReserveMemory(map_size);
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@ -24,7 +24,7 @@ public:
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GLintptr MakeQuadArray(u32 first, u32 count);
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GLintptr MakeQuadIndexed(Tegra::GPUVAddr gpu_addr, std::size_t index_size, u32 count);
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GLintptr MakeQuadIndexed(GPUVAddr gpu_addr, std::size_t index_size, u32 count);
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private:
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OGLBufferCache& buffer_cache;
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@ -225,8 +225,8 @@ void RasterizerOpenGL::SetupVertexBuffer(GLuint vao) {
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if (!vertex_array.IsEnabled())
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continue;
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const Tegra::GPUVAddr start = vertex_array.StartAddress();
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const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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const GPUVAddr start = vertex_array.StartAddress();
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const GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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ASSERT(end > start);
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const u64 size = end - start + 1;
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@ -421,8 +421,8 @@ std::size_t RasterizerOpenGL::CalculateVertexArraysSize() const {
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if (!regs.vertex_array[index].IsEnabled())
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continue;
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const Tegra::GPUVAddr start = regs.vertex_array[index].StartAddress();
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const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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const GPUVAddr start = regs.vertex_array[index].StartAddress();
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const GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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ASSERT(end > start);
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size += end - start + 1;
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@ -55,7 +55,7 @@ static void ApplyTextureDefaults(GLuint texture, u32 max_mip_level) {
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}
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}
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void SurfaceParams::InitCacheParameters(Tegra::GPUVAddr gpu_addr_) {
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void SurfaceParams::InitCacheParameters(GPUVAddr gpu_addr_) {
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auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
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gpu_addr = gpu_addr_;
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@ -222,7 +222,7 @@ std::size_t SurfaceParams::InnerMemorySize(bool force_gl, bool layer_only,
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}
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/*static*/ SurfaceParams SurfaceParams::CreateForDepthBuffer(
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u32 zeta_width, u32 zeta_height, Tegra::GPUVAddr zeta_address, Tegra::DepthFormat format,
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u32 zeta_width, u32 zeta_height, GPUVAddr zeta_address, Tegra::DepthFormat format,
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u32 block_width, u32 block_height, u32 block_depth,
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Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout type) {
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SurfaceParams params{};
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@ -980,11 +980,11 @@ void RasterizerCacheOpenGL::FastLayeredCopySurface(const Surface& src_surface,
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const auto& init_params{src_surface->GetSurfaceParams()};
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const auto& dst_params{dst_surface->GetSurfaceParams()};
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auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
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Tegra::GPUVAddr address{init_params.gpu_addr};
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GPUVAddr address{init_params.gpu_addr};
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const std::size_t layer_size{dst_params.LayerMemorySize()};
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for (u32 layer = 0; layer < dst_params.depth; layer++) {
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for (u32 mipmap = 0; mipmap < dst_params.max_mip_level; mipmap++) {
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const Tegra::GPUVAddr sub_address{address + dst_params.GetMipmapLevelOffset(mipmap)};
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const GPUVAddr sub_address{address + dst_params.GetMipmapLevelOffset(mipmap)};
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const Surface& copy{TryGet(memory_manager.GetPointer(sub_address))};
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if (!copy) {
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continue;
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@ -1244,10 +1244,9 @@ static std::optional<u32> TryFindBestMipMap(std::size_t memory, const SurfacePar
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return {};
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}
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static std::optional<u32> TryFindBestLayer(Tegra::GPUVAddr addr, const SurfaceParams params,
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u32 mipmap) {
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static std::optional<u32> TryFindBestLayer(GPUVAddr addr, const SurfaceParams params, u32 mipmap) {
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const std::size_t size{params.LayerMemorySize()};
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Tegra::GPUVAddr start{params.gpu_addr + params.GetMipmapLevelOffset(mipmap)};
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GPUVAddr start{params.gpu_addr + params.GetMipmapLevelOffset(mipmap)};
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for (u32 i = 0; i < params.depth; i++) {
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if (start == addr) {
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return {i};
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@ -210,7 +210,7 @@ struct SurfaceParams {
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/// Creates SurfaceParams for a depth buffer configuration
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static SurfaceParams CreateForDepthBuffer(
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u32 zeta_width, u32 zeta_height, Tegra::GPUVAddr zeta_address, Tegra::DepthFormat format,
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u32 zeta_width, u32 zeta_height, GPUVAddr zeta_address, Tegra::DepthFormat format,
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u32 block_width, u32 block_height, u32 block_depth,
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Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout type);
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@ -232,7 +232,7 @@ struct SurfaceParams {
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}
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/// Initializes parameters for caching, should be called after everything has been initialized
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void InitCacheParameters(Tegra::GPUVAddr gpu_addr);
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void InitCacheParameters(GPUVAddr gpu_addr);
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std::string TargetName() const {
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switch (target) {
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@ -297,7 +297,7 @@ struct SurfaceParams {
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bool srgb_conversion;
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// Parameters used for caching
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u8* host_ptr;
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Tegra::GPUVAddr gpu_addr;
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GPUVAddr gpu_addr;
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std::size_t size_in_bytes;
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std::size_t size_in_bytes_gl;
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@ -32,7 +32,7 @@ struct UnspecializedShader {
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namespace {
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/// Gets the address for the specified shader stage program
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Tegra::GPUVAddr GetShaderAddress(Maxwell::ShaderProgram program) {
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GPUVAddr GetShaderAddress(Maxwell::ShaderProgram program) {
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const auto& gpu{Core::System::GetInstance().GPU().Maxwell3D()};
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const auto& shader_config{gpu.regs.shader_config[static_cast<std::size_t>(program)]};
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return gpu.regs.code_address.CodeAddress() + shader_config.offset;
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@ -486,7 +486,7 @@ Shader ShaderCacheOpenGL::GetStageProgram(Maxwell::ShaderProgram program) {
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}
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auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
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const Tegra::GPUVAddr program_addr{GetShaderAddress(program)};
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const GPUVAddr program_addr{GetShaderAddress(program)};
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// Look up shader in the cache based on address
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const auto& host_ptr{memory_manager.GetPointer(program_addr)};
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@ -39,8 +39,7 @@ VKBufferCache::VKBufferCache(Tegra::MemoryManager& tegra_memory_manager,
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VKBufferCache::~VKBufferCache() = default;
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u64 VKBufferCache::UploadMemory(Tegra::GPUVAddr gpu_addr, std::size_t size, u64 alignment,
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bool cache) {
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u64 VKBufferCache::UploadMemory(GPUVAddr gpu_addr, std::size_t size, u64 alignment, bool cache) {
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const auto cpu_addr{tegra_memory_manager.GpuToCpuAddress(gpu_addr)};
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ASSERT_MSG(cpu_addr, "Invalid GPU address");
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@ -68,8 +68,7 @@ public:
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/// Uploads data from a guest GPU address. Returns host's buffer offset where it's been
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/// allocated.
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u64 UploadMemory(Tegra::GPUVAddr gpu_addr, std::size_t size, u64 alignment = 4,
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bool cache = true);
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u64 UploadMemory(GPUVAddr gpu_addr, std::size_t size, u64 alignment = 4, bool cache = true);
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/// Uploads from a host memory. Returns host's buffer offset where it's been allocated.
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u64 UploadHostMemory(const u8* raw_pointer, std::size_t size, u64 alignment = 4);
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@ -261,7 +261,7 @@ void GraphicsSurfaceWidget::OnSurfaceSourceChanged(int new_value) {
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void GraphicsSurfaceWidget::OnSurfaceAddressChanged(qint64 new_value) {
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if (surface_address != new_value) {
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surface_address = static_cast<Tegra::GPUVAddr>(new_value);
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surface_address = static_cast<GPUVAddr>(new_value);
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surface_source_list->setCurrentIndex(static_cast<int>(Source::Custom));
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emit Update();
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@ -87,7 +87,7 @@ private:
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QPushButton* save_surface;
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Source surface_source;
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Tegra::GPUVAddr surface_address;
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GPUVAddr surface_address;
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unsigned surface_width;
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unsigned surface_height;
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Tegra::Texture::TextureFormat surface_format;
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