texture_cache: Change internal cache from lists to vectors
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parent
b347543e83
commit
28d7c2f5a5
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@ -4,11 +4,11 @@
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#pragma once
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#pragma once
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#include <list>
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#include <memory>
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#include <memory>
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#include <set>
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#include <set>
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#include <tuple>
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#include <tuple>
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#include <unordered_map>
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#include <unordered_map>
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#include <vector>
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#include <boost/icl/interval_map.hpp>
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#include <boost/icl/interval_map.hpp>
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#include <boost/range/iterator_range.hpp>
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#include <boost/range/iterator_range.hpp>
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@ -172,7 +172,7 @@ public:
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return nullptr;
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return nullptr;
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}
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}
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const CacheAddr page = cache_addr >> registry_page_bits;
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const CacheAddr page = cache_addr >> registry_page_bits;
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std::list<TSurface>& list = registry[page];
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std::vector<TSurface>& list = registry[page];
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for (auto& s : list) {
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for (auto& s : list) {
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if (s->GetCacheAddr() == cache_addr) {
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if (s->GetCacheAddr() == cache_addr) {
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return s;
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return s;
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@ -482,7 +482,8 @@ private:
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CacheAddr start = surface->GetCacheAddr() >> registry_page_bits;
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CacheAddr start = surface->GetCacheAddr() >> registry_page_bits;
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const CacheAddr end = (surface->GetCacheAddrEnd() - 1) >> registry_page_bits;
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const CacheAddr end = (surface->GetCacheAddrEnd() - 1) >> registry_page_bits;
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while (start <= end) {
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while (start <= end) {
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registry[start].remove(surface);
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auto& reg{registry[start]};
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reg.erase(std::find(reg.begin(), reg.end(), surface));
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start++;
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start++;
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}
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}
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}
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}
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@ -496,7 +497,7 @@ private:
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const CacheAddr end = (cache_addr_end - 1) >> registry_page_bits;
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const CacheAddr end = (cache_addr_end - 1) >> registry_page_bits;
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std::vector<TSurface> surfaces;
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std::vector<TSurface> surfaces;
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while (start <= end) {
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while (start <= end) {
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std::list<TSurface>& list = registry[start];
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std::vector<TSurface>& list = registry[start];
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for (auto& s : list) {
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for (auto& s : list) {
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if (!s->IsPicked() && s->Overlaps(cache_addr, cache_addr_end)) {
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if (!s->IsPicked() && s->Overlaps(cache_addr, cache_addr_end)) {
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s->MarkAsPicked(true);
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s->MarkAsPicked(true);
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@ -553,12 +554,12 @@ private:
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// large in size.
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// large in size.
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static constexpr u64 registry_page_bits{20};
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static constexpr u64 registry_page_bits{20};
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static constexpr u64 registry_page_size{1 << registry_page_bits};
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static constexpr u64 registry_page_size{1 << registry_page_bits};
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std::unordered_map<CacheAddr, std::list<TSurface>> registry;
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std::unordered_map<CacheAddr, std::vector<TSurface>> registry;
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/// The surface reserve is a "backup" cache, this is where we put unique surfaces that have
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/// The surface reserve is a "backup" cache, this is where we put unique surfaces that have
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/// previously been used. This is to prevent surfaces from being constantly created and
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/// previously been used. This is to prevent surfaces from being constantly created and
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/// destroyed when used with different surface parameters.
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/// destroyed when used with different surface parameters.
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std::unordered_map<SurfaceParams, std::list<TSurface>> surface_reserve;
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std::unordered_map<SurfaceParams, std::vector<TSurface>> surface_reserve;
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std::array<RenderInfo, Tegra::Engines::Maxwell3D::Regs::NumRenderTargets> render_targets;
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std::array<RenderInfo, Tegra::Engines::Maxwell3D::Regs::NumRenderTargets> render_targets;
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DepthBufferInfo depth_buffer;
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DepthBufferInfo depth_buffer;
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