yuzu-emu
/
yuzu-android
Archived
1
0
Fork 0

GPU: Further improve synchronization.

This commit is contained in:
bunnei 2014-12-24 02:49:09 -05:00
parent 4783133bbd
commit 5799025ac4
1 changed files with 20 additions and 22 deletions

View File

@ -21,12 +21,10 @@ namespace GPU {
Regs g_regs;
u32 g_cur_line = 0; ///< Current vertical screen line
u64 g_last_line_ticks = 0; ///< CPU tick count from last vertical screen line
u64 g_last_frame_ticks = 0; ///< CPU tick count from last frame
static u32 kFrameCycles = 0; ///< 268MHz / 60 frames per second
static u32 kFrameTicks = 0; ///< Approximate number of instructions/frame
static u64 frame_ticks = 0; ///< 268MHz / 60 frames per second
static u32 cur_line = 0; ///< Current vertical screen line
static u64 last_frame_ticks = 0; ///< CPU tick count from last frame
static u64 last_update_tick = 0; ///< CPU ticl count from last GPU update
template <typename T>
inline void Read(T &var, const u32 raw_addr) {
@ -34,7 +32,7 @@ inline void Read(T &var, const u32 raw_addr) {
u32 index = addr / 4;
// Reads other than u32 are untested, so I'd rather have them abort than silently fail
if (index >= Regs::NumIds() || !std::is_same<T,u32>::value) {
if (index >= Regs::NumIds() || !std::is_same<T, u32>::value) {
LOG_ERROR(HW_GPU, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr);
return;
}
@ -48,7 +46,7 @@ inline void Write(u32 addr, const T data) {
u32 index = addr / 4;
// Writes other than u32 are untested, so I'd rather have them abort than silently fail
if (index >= Regs::NumIds() || !std::is_same<T,u32>::value) {
if (index >= Regs::NumIds() || !std::is_same<T, u32>::value) {
LOG_ERROR(HW_GPU, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr);
return;
}
@ -179,7 +177,6 @@ template void Write<u8>(u32 addr, const u8 data);
/// Update hardware
void Update() {
auto& framebuffer_top = g_regs.framebuffer_config[0];
u64 current_ticks = Core::g_app_core->GetTicks();
// Update the frame after a certain number of CPU ticks have elapsed. This assumes that the
// active frame in memory is always complete to render. There also may be issues with this
@ -189,9 +186,9 @@ void Update() {
// primitive homebrew relies on a vertical blank interrupt to happen inevitably (regardless of a
// threading reschedule).
if ((current_ticks - g_last_frame_ticks) > GPU::kFrameTicks) {
if ((Core::g_app_core->GetTicks() - last_frame_ticks) > (GPU::frame_ticks)) {
VideoCore::g_renderer->SwapBuffers();
g_last_frame_ticks = current_ticks;
last_frame_ticks = Core::g_app_core->GetTicks();
}
// Synchronize GPU on a thread reschedule: Because we cannot accurately predict a vertical
@ -199,17 +196,20 @@ void Update() {
// accurately when this is signalled between thread switches.
if (HLE::g_reschedule) {
u64 current_ticks = Core::g_app_core->GetTicks();
u64 line_ticks = (GPU::frame_ticks / framebuffer_top.height) * 16;
// Synchronize line...
if ((current_ticks - g_last_line_ticks) >= GPU::kFrameTicks / framebuffer_top.height) {
//// Synchronize line...
if ((current_ticks - last_update_tick) >= line_ticks) {
GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PDC0);
g_cur_line++;
g_last_line_ticks = current_ticks;
cur_line++;
last_update_tick += line_ticks;
}
// Synchronize frame...
if (g_cur_line >= framebuffer_top.height) {
g_cur_line = 0;
if (cur_line >= framebuffer_top.height) {
cur_line = 0;
VideoCore::g_renderer->SwapBuffers();
GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PDC1);
}
}
@ -217,11 +217,9 @@ void Update() {
/// Initialize hardware
void Init() {
kFrameCycles = 268123480 / Settings::values.gpu_refresh_rate;
kFrameTicks = kFrameCycles / 3;
g_cur_line = 0;
g_last_frame_ticks = g_last_line_ticks = Core::g_app_core->GetTicks();
frame_ticks = 268123480 / Settings::values.gpu_refresh_rate;
cur_line = 0;
last_update_tick = last_frame_ticks = Core::g_app_core->GetTicks();
auto& framebuffer_top = g_regs.framebuffer_config[0];
auto& framebuffer_sub = g_regs.framebuffer_config[1];