commit
5ae3a9657d
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@ -947,6 +947,15 @@ typedef struct _smla_inst {
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unsigned int Rn;
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} smla_inst;
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typedef struct smlalxy_inst {
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unsigned int x;
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unsigned int y;
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unsigned int RdLo;
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unsigned int RdHi;
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unsigned int Rm;
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unsigned int Rn;
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} smlalxy_inst;
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typedef struct ssat_inst {
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unsigned int Rn;
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unsigned int Rd;
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@ -2403,7 +2412,25 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index)
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return inst_base;
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMLALXY"); }
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ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index)
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{
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arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst));
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smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = NON_BRANCH;
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inst_base->load_r15 = 0;
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inst_cream->x = BIT(inst, 5);
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inst_cream->y = BIT(inst, 6);
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inst_cream->RdLo = BITS(inst, 12, 15);
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inst_cream->RdHi = BITS(inst, 16, 19);
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inst_cream->Rn = BITS(inst, 0, 4);
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inst_cream->Rm = BITS(inst, 8, 11);
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return inst_base;
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index)
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{
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@ -5686,6 +5713,34 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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}
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SMLALXY_INST:
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{
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component;
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u64 operand1 = RN;
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u64 operand2 = RM;
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if (inst_cream->x != 0)
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operand1 >>= 16;
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if (inst_cream->y != 0)
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operand2 >>= 16;
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operand1 &= 0xFFFF;
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if (operand1 & 0x8000)
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operand1 -= 65536;
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operand2 &= 0xFFFF;
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if (operand2 & 0x8000)
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operand2 -= 65536;
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u64 dest = ((u64)RDHI << 32 | RDLO) + (operand1 * operand2);
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RDLO = (dest & 0xFFFFFFFF);
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RDHI = ((dest >> 32) & 0xFFFFFFFF);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(smlalxy_inst));
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FETCH_INST;
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GOTO_NEXT_INST;
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}
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SMLAW_INST:
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{
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