vk_graphics_pipeline: Generate specialized pipeline config functions and improve code
This commit is contained in:
parent
f4ace63957
commit
5ed871398b
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@ -19,14 +19,24 @@
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#include "video_core/renderer_vulkan/vk_update_descriptor.h"
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#include "video_core/renderer_vulkan/vk_update_descriptor.h"
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#include "video_core/vulkan_common/vulkan_device.h"
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#include "video_core/vulkan_common/vulkan_device.h"
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#ifdef _MSC_VER
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#define LAMBDA_FORCEINLINE [[msvc::forceinline]]
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#else
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#define LAMBDA_FORCEINLINE
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#endif
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namespace Vulkan {
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namespace Vulkan {
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namespace {
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namespace {
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using boost::container::small_vector;
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using boost::container::small_vector;
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using boost::container::static_vector;
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using boost::container::static_vector;
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using Shader::ImageBufferDescriptor;
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using VideoCore::Surface::PixelFormat;
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using VideoCore::Surface::PixelFormat;
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using VideoCore::Surface::PixelFormatFromDepthFormat;
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using VideoCore::Surface::PixelFormatFromDepthFormat;
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using VideoCore::Surface::PixelFormatFromRenderTargetFormat;
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using VideoCore::Surface::PixelFormatFromRenderTargetFormat;
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constexpr size_t NUM_STAGES = Maxwell::MaxShaderStage;
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constexpr size_t MAX_IMAGE_ELEMENTS = 64;
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DescriptorLayoutBuilder MakeBuilder(const Device& device, std::span<const Shader::Info> infos) {
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DescriptorLayoutBuilder MakeBuilder(const Device& device, std::span<const Shader::Info> infos) {
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DescriptorLayoutBuilder builder{device.GetLogical()};
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DescriptorLayoutBuilder builder{device.GetLogical()};
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for (size_t index = 0; index < infos.size(); ++index) {
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for (size_t index = 0; index < infos.size(); ++index) {
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@ -116,6 +126,80 @@ size_t NumAttachments(const FixedPipelineState& state) {
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}
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}
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return num;
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return num;
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}
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}
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template <typename Spec>
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bool Passes(const std::array<vk::ShaderModule, NUM_STAGES>& modules,
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const std::array<Shader::Info, NUM_STAGES>& stage_infos) {
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for (size_t stage = 0; stage < NUM_STAGES; ++stage) {
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if (!Spec::enabled_stages[stage] && modules[stage]) {
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return false;
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}
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const auto& info{stage_infos[stage]};
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if constexpr (!Spec::has_storage_buffers) {
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if (!info.storage_buffers_descriptors.empty()) {
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return false;
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}
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}
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if constexpr (!Spec::has_texture_buffers) {
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if (!info.texture_buffer_descriptors.empty()) {
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return false;
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}
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}
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if constexpr (!Spec::has_image_buffers) {
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if (!info.image_buffer_descriptors.empty()) {
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return false;
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}
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}
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if constexpr (!Spec::has_images) {
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if (!info.image_descriptors.empty()) {
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return false;
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}
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}
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}
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return true;
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}
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using ConfigureFuncPtr = void (*)(GraphicsPipeline*, bool);
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template <typename Spec, typename... Specs>
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ConfigureFuncPtr FindSpec(const std::array<vk::ShaderModule, NUM_STAGES>& modules,
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const std::array<Shader::Info, NUM_STAGES>& stage_infos) {
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if constexpr (sizeof...(Specs) > 0) {
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if (!Passes<Spec>(modules, stage_infos)) {
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return FindSpec<Specs...>(modules, stage_infos);
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}
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}
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return GraphicsPipeline::MakeConfigureSpecFunc<Spec>();
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}
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struct SimpleVertexFragmentSpec {
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static constexpr std::array<bool, 5> enabled_stages{true, false, false, false, true};
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static constexpr bool has_storage_buffers = false;
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static constexpr bool has_texture_buffers = false;
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static constexpr bool has_image_buffers = false;
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static constexpr bool has_images = false;
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};
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struct SimpleVertexSpec {
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static constexpr std::array<bool, 5> enabled_stages{true, false, false, false, false};
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static constexpr bool has_storage_buffers = false;
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static constexpr bool has_texture_buffers = false;
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static constexpr bool has_image_buffers = false;
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static constexpr bool has_images = false;
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};
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struct DefaultSpec {
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static constexpr std::array<bool, 5> enabled_stages{true, true, true, true, true};
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static constexpr bool has_storage_buffers = true;
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static constexpr bool has_texture_buffers = true;
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static constexpr bool has_image_buffers = true;
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static constexpr bool has_images = true;
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};
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ConfigureFuncPtr ConfigureFunc(const std::array<vk::ShaderModule, NUM_STAGES>& modules,
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const std::array<Shader::Info, NUM_STAGES>& infos) {
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return FindSpec<SimpleVertexSpec, SimpleVertexFragmentSpec, DefaultSpec>(modules, infos);
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}
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} // Anonymous namespace
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} // Anonymous namespace
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GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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@ -144,6 +228,7 @@ GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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descriptor_update_template = builder.CreateTemplate(set_layout, *pipeline_layout);
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descriptor_update_template = builder.CreateTemplate(set_layout, *pipeline_layout);
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const VkRenderPass render_pass{render_pass_cache.Get(MakeRenderPassKey(key.state))};
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const VkRenderPass render_pass{render_pass_cache.Get(MakeRenderPassKey(key.state))};
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Validate();
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MakePipeline(device, render_pass);
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MakePipeline(device, render_pass);
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std::lock_guard lock{build_mutex};
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std::lock_guard lock{build_mutex};
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@ -155,6 +240,7 @@ GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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} else {
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} else {
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func();
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func();
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}
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}
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configure_func = ConfigureFunc(spv_modules, stage_infos);
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}
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}
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void GraphicsPipeline::AddTransition(GraphicsPipeline* transition) {
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void GraphicsPipeline::AddTransition(GraphicsPipeline* transition) {
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@ -162,26 +248,29 @@ void GraphicsPipeline::AddTransition(GraphicsPipeline* transition) {
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transitions.push_back(transition);
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transitions.push_back(transition);
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}
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}
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void GraphicsPipeline::Configure(bool is_indexed) {
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template <typename Spec>
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static constexpr size_t max_images_elements = 64;
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void GraphicsPipeline::ConfigureImpl(bool is_indexed) {
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std::array<ImageId, max_images_elements> image_view_ids;
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std::array<ImageId, MAX_IMAGE_ELEMENTS> image_view_ids;
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static_vector<u32, max_images_elements> image_view_indices;
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std::array<u32, MAX_IMAGE_ELEMENTS> image_view_indices;
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static_vector<VkSampler, max_images_elements> samplers;
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std::array<VkSampler, MAX_IMAGE_ELEMENTS> samplers;
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size_t image_index{};
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texture_cache.SynchronizeGraphicsDescriptors();
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texture_cache.SynchronizeGraphicsDescriptors();
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const auto& regs{maxwell3d.regs};
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const auto& regs{maxwell3d.regs};
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const bool via_header_index{regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex};
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const bool via_header_index{regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex};
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for (size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
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const auto config_stage{[&](size_t stage) LAMBDA_FORCEINLINE {
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const Shader::Info& info{stage_infos[stage]};
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const Shader::Info& info{stage_infos[stage]};
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buffer_cache.SetEnabledUniformBuffers(stage, info.constant_buffer_mask);
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buffer_cache.SetEnabledUniformBuffers(stage, info.constant_buffer_mask);
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buffer_cache.UnbindGraphicsStorageBuffers(stage);
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buffer_cache.UnbindGraphicsStorageBuffers(stage);
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size_t ssbo_index{};
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if constexpr (Spec::has_storage_buffers) {
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for (const auto& desc : info.storage_buffers_descriptors) {
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size_t ssbo_index{};
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ASSERT(desc.count == 1);
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for (const auto& desc : info.storage_buffers_descriptors) {
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buffer_cache.BindGraphicsStorageBuffer(stage, ssbo_index, desc.cbuf_index,
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ASSERT(desc.count == 1);
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desc.cbuf_offset, desc.is_written);
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buffer_cache.BindGraphicsStorageBuffer(stage, ssbo_index, desc.cbuf_index,
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++ssbo_index;
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desc.cbuf_offset, desc.is_written);
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++ssbo_index;
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}
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}
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}
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const auto& cbufs{maxwell3d.state.shader_stages[stage].const_buffers};
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const auto& cbufs{maxwell3d.state.shader_stages[stage].const_buffers};
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const auto read_handle{[&](const auto& desc, u32 index) {
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const auto read_handle{[&](const auto& desc, u32 index) {
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@ -207,33 +296,60 @@ void GraphicsPipeline::Configure(bool is_indexed) {
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const auto add_image{[&](const auto& desc) {
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const auto add_image{[&](const auto& desc) {
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for (u32 index = 0; index < desc.count; ++index) {
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for (u32 index = 0; index < desc.count; ++index) {
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const TextureHandle handle{read_handle(desc, index)};
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const TextureHandle handle{read_handle(desc, index)};
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image_view_indices.push_back(handle.image);
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image_view_indices[image_index++] = handle.image;
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}
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}
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}};
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}};
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std::ranges::for_each(info.texture_buffer_descriptors, add_image);
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if constexpr (Spec::has_texture_buffers) {
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std::ranges::for_each(info.image_buffer_descriptors, add_image);
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for (const auto& desc : info.texture_buffer_descriptors) {
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add_image(desc);
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}
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}
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if constexpr (Spec::has_image_buffers) {
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for (const auto& desc : info.image_buffer_descriptors) {
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add_image(desc);
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}
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}
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for (const auto& desc : info.texture_descriptors) {
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for (const auto& desc : info.texture_descriptors) {
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for (u32 index = 0; index < desc.count; ++index) {
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for (u32 index = 0; index < desc.count; ++index) {
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const TextureHandle handle{read_handle(desc, index)};
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const TextureHandle handle{read_handle(desc, index)};
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image_view_indices.push_back(handle.image);
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image_view_indices[image_index] = handle.image;
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Sampler* const sampler{texture_cache.GetGraphicsSampler(handle.sampler)};
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Sampler* const sampler{texture_cache.GetGraphicsSampler(handle.sampler)};
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samplers.push_back(sampler->Handle());
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samplers[image_index] = sampler->Handle();
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++image_index;
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}
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}
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}
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}
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std::ranges::for_each(info.image_descriptors, add_image);
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if constexpr (Spec::has_images) {
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for (const auto& desc : info.image_descriptors) {
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add_image(desc);
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}
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}
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}};
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if constexpr (Spec::enabled_stages[0]) {
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config_stage(0);
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}
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}
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const std::span indices_span(image_view_indices.data(), image_view_indices.size());
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if constexpr (Spec::enabled_stages[1]) {
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config_stage(1);
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}
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if constexpr (Spec::enabled_stages[2]) {
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config_stage(2);
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}
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if constexpr (Spec::enabled_stages[3]) {
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config_stage(3);
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}
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if constexpr (Spec::enabled_stages[4]) {
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config_stage(4);
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}
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const std::span indices_span(image_view_indices.data(), image_index);
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texture_cache.FillGraphicsImageViews(indices_span, image_view_ids);
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texture_cache.FillGraphicsImageViews(indices_span, image_view_ids);
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ImageId* texture_buffer_index{image_view_ids.data()};
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ImageId* texture_buffer_index{image_view_ids.data()};
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for (size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
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const auto bind_stage_info{[&](size_t stage) LAMBDA_FORCEINLINE {
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size_t index{};
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size_t index{};
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const auto add_buffer{[&](const auto& desc) {
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const auto add_buffer{[&](const auto& desc) {
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for (u32 i = 0; i < desc.count; ++i) {
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for (u32 i = 0; i < desc.count; ++i) {
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bool is_written{false};
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bool is_written{false};
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if constexpr (std::is_same_v<decltype(desc),
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if constexpr (std::is_same_v<decltype(desc), const ImageBufferDescriptor&>) {
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const Shader::ImageBufferDescriptor&>) {
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is_written = desc.is_written;
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is_written = desc.is_written;
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}
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}
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ImageView& image_view{texture_cache.GetImageView(*texture_buffer_index)};
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ImageView& image_view{texture_cache.GetImageView(*texture_buffer_index)};
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@ -245,29 +361,75 @@ void GraphicsPipeline::Configure(bool is_indexed) {
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}
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}
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}};
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}};
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const Shader::Info& info{stage_infos[stage]};
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const Shader::Info& info{stage_infos[stage]};
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buffer_cache.UnbindGraphicsTextureBuffers(stage);
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if constexpr (Spec::has_texture_buffers || Spec::has_image_buffers) {
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std::ranges::for_each(info.texture_buffer_descriptors, add_buffer);
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buffer_cache.UnbindGraphicsTextureBuffers(stage);
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std::ranges::for_each(info.image_buffer_descriptors, add_buffer);
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}
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if constexpr (Spec::has_texture_buffers) {
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for (const auto& desc : info.texture_buffer_descriptors) {
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add_buffer(desc);
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}
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}
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if constexpr (Spec::has_image_buffers) {
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for (const auto& desc : info.image_buffer_descriptors) {
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add_buffer(desc);
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}
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}
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for (const auto& desc : info.texture_descriptors) {
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for (const auto& desc : info.texture_descriptors) {
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texture_buffer_index += desc.count;
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texture_buffer_index += desc.count;
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}
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}
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for (const auto& desc : info.image_descriptors) {
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if constexpr (Spec::has_images) {
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texture_buffer_index += desc.count;
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for (const auto& desc : info.image_descriptors) {
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texture_buffer_index += desc.count;
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}
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}
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}
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}};
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if constexpr (Spec::enabled_stages[0]) {
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bind_stage_info(0);
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}
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if constexpr (Spec::enabled_stages[1]) {
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bind_stage_info(1);
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}
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if constexpr (Spec::enabled_stages[2]) {
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bind_stage_info(2);
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}
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if constexpr (Spec::enabled_stages[3]) {
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bind_stage_info(3);
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}
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if constexpr (Spec::enabled_stages[4]) {
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bind_stage_info(4);
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}
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}
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buffer_cache.UpdateGraphicsBuffers(is_indexed);
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buffer_cache.UpdateGraphicsBuffers(is_indexed);
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buffer_cache.BindHostGeometryBuffers(is_indexed);
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buffer_cache.BindHostGeometryBuffers(is_indexed);
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update_descriptor_queue.Acquire();
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update_descriptor_queue.Acquire();
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const VkSampler* samplers_it{samplers.data()};
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const VkSampler* samplers_it{samplers.data()};
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const ImageId* views_it{image_view_ids.data()};
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const ImageId* views_it{image_view_ids.data()};
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for (size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
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const auto prepare_stage{[&](size_t stage) LAMBDA_FORCEINLINE {
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buffer_cache.BindHostStageBuffers(stage);
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buffer_cache.BindHostStageBuffers(stage);
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PushImageDescriptors(stage_infos[stage], samplers_it, views_it, texture_cache,
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PushImageDescriptors(stage_infos[stage], samplers_it, views_it, texture_cache,
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update_descriptor_queue);
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update_descriptor_queue);
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}};
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if constexpr (Spec::enabled_stages[0]) {
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prepare_stage(0);
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}
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}
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if constexpr (Spec::enabled_stages[1]) {
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prepare_stage(1);
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}
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if constexpr (Spec::enabled_stages[2]) {
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prepare_stage(2);
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}
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if constexpr (Spec::enabled_stages[3]) {
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prepare_stage(3);
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}
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if constexpr (Spec::enabled_stages[4]) {
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prepare_stage(4);
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}
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ConfigureDraw();
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}
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void GraphicsPipeline::ConfigureDraw() {
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texture_cache.UpdateRenderTargets(false);
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texture_cache.UpdateRenderTargets(false);
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scheduler.RequestRenderpass(texture_cache.GetFramebuffer());
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scheduler.RequestRenderpass(texture_cache.GetFramebuffer());
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@ -550,4 +712,23 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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});
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});
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}
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}
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void GraphicsPipeline::Validate() {
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size_t num_images{};
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for (const auto& info : stage_infos) {
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||||||
|
for (const auto& desc : info.texture_buffer_descriptors) {
|
||||||
|
num_images += desc.count;
|
||||||
|
}
|
||||||
|
for (const auto& desc : info.image_buffer_descriptors) {
|
||||||
|
num_images += desc.count;
|
||||||
|
}
|
||||||
|
for (const auto& desc : info.texture_descriptors) {
|
||||||
|
num_images += desc.count;
|
||||||
|
}
|
||||||
|
for (const auto& desc : info.image_descriptors) {
|
||||||
|
num_images += desc.count;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
ASSERT(num_images <= MAX_IMAGE_ELEMENTS);
|
||||||
|
}
|
||||||
|
|
||||||
} // namespace Vulkan
|
} // namespace Vulkan
|
||||||
|
|
|
@ -75,8 +75,6 @@ public:
|
||||||
std::array<vk::ShaderModule, NUM_STAGES> stages,
|
std::array<vk::ShaderModule, NUM_STAGES> stages,
|
||||||
const std::array<const Shader::Info*, NUM_STAGES>& infos);
|
const std::array<const Shader::Info*, NUM_STAGES>& infos);
|
||||||
|
|
||||||
void Configure(bool is_indexed);
|
|
||||||
|
|
||||||
GraphicsPipeline& operator=(GraphicsPipeline&&) noexcept = delete;
|
GraphicsPipeline& operator=(GraphicsPipeline&&) noexcept = delete;
|
||||||
GraphicsPipeline(GraphicsPipeline&&) noexcept = delete;
|
GraphicsPipeline(GraphicsPipeline&&) noexcept = delete;
|
||||||
|
|
||||||
|
@ -85,6 +83,10 @@ public:
|
||||||
|
|
||||||
void AddTransition(GraphicsPipeline* transition);
|
void AddTransition(GraphicsPipeline* transition);
|
||||||
|
|
||||||
|
void Configure(bool is_indexed) {
|
||||||
|
configure_func(this, is_indexed);
|
||||||
|
}
|
||||||
|
|
||||||
GraphicsPipeline* Next(const GraphicsPipelineCacheKey& current_key) noexcept {
|
GraphicsPipeline* Next(const GraphicsPipelineCacheKey& current_key) noexcept {
|
||||||
if (key == current_key) {
|
if (key == current_key) {
|
||||||
return this;
|
return this;
|
||||||
|
@ -94,9 +96,23 @@ public:
|
||||||
: nullptr;
|
: nullptr;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
template <typename Spec>
|
||||||
|
static auto MakeConfigureSpecFunc() {
|
||||||
|
return [](GraphicsPipeline* pipeline, bool is_indexed) {
|
||||||
|
pipeline->ConfigureImpl<Spec>(is_indexed);
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
template <typename Spec>
|
||||||
|
void ConfigureImpl(bool is_indexed);
|
||||||
|
|
||||||
|
void ConfigureDraw();
|
||||||
|
|
||||||
void MakePipeline(const Device& device, VkRenderPass render_pass);
|
void MakePipeline(const Device& device, VkRenderPass render_pass);
|
||||||
|
|
||||||
|
void Validate();
|
||||||
|
|
||||||
const GraphicsPipelineCacheKey key;
|
const GraphicsPipelineCacheKey key;
|
||||||
Tegra::Engines::Maxwell3D& maxwell3d;
|
Tegra::Engines::Maxwell3D& maxwell3d;
|
||||||
Tegra::MemoryManager& gpu_memory;
|
Tegra::MemoryManager& gpu_memory;
|
||||||
|
@ -105,6 +121,8 @@ private:
|
||||||
VKScheduler& scheduler;
|
VKScheduler& scheduler;
|
||||||
VKUpdateDescriptorQueue& update_descriptor_queue;
|
VKUpdateDescriptorQueue& update_descriptor_queue;
|
||||||
|
|
||||||
|
void (*configure_func)(GraphicsPipeline*, bool);
|
||||||
|
|
||||||
std::vector<GraphicsPipelineCacheKey> transition_keys;
|
std::vector<GraphicsPipelineCacheKey> transition_keys;
|
||||||
std::vector<GraphicsPipeline*> transitions;
|
std::vector<GraphicsPipeline*> transitions;
|
||||||
|
|
||||||
|
|
Reference in New Issue