emitter: constexpr-ify OpArg
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77bcdafc94
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@ -159,34 +159,35 @@ struct OpArg
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{
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{
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friend class XEmitter;
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friend class XEmitter;
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OpArg() {} // dummy op arg, used for storage
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constexpr OpArg() = default; // dummy op arg, used for storage
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OpArg(u64 _offset, int _scale, X64Reg rmReg = RAX, X64Reg scaledReg = RAX)
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constexpr OpArg(u64 offset_, int scale_, X64Reg rmReg = RAX, X64Reg scaledReg = RAX)
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: scale(static_cast<u8>(scale_))
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, offsetOrBaseReg(static_cast<u16>(rmReg))
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, indexReg(static_cast<u16>(scaledReg))
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, offset(offset_)
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{
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{
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operandReg = 0;
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scale = (u8)_scale;
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offsetOrBaseReg = (u16)rmReg;
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indexReg = (u16)scaledReg;
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//if scale == 0 never mind offsetting
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offset = _offset;
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}
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}
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bool operator==(const OpArg &b) const
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constexpr bool operator==(const OpArg &b) const
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{
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{
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return operandReg == b.operandReg && scale == b.scale && offsetOrBaseReg == b.offsetOrBaseReg &&
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return operandReg == b.operandReg &&
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indexReg == b.indexReg && offset == b.offset;
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scale == b.scale &&
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offsetOrBaseReg == b.offsetOrBaseReg &&
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indexReg == b.indexReg &&
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offset == b.offset;
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}
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}
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void WriteRex(XEmitter *emit, int opBits, int bits, int customOp = -1) const;
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void WriteRex(XEmitter *emit, int opBits, int bits, int customOp = -1) const;
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void WriteVex(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const;
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void WriteVex(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const;
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void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
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void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
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void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits);
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void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits);
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void WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const;
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void WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const;
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bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;}
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bool IsSimpleReg() const {return scale == SCALE_NONE;}
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constexpr bool IsImm() const { return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64; }
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bool IsSimpleReg(X64Reg reg) const
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constexpr bool IsSimpleReg() const { return scale == SCALE_NONE; }
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constexpr bool IsSimpleReg(X64Reg reg) const
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{
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{
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if (!IsSimpleReg())
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return IsSimpleReg() && GetSimpleReg() == reg;
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return false;
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return GetSimpleReg() == reg;
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}
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}
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bool CanDoOpWith(const OpArg &other) const
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bool CanDoOpWith(const OpArg &other) const
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@ -218,16 +219,15 @@ struct OpArg
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}
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}
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}
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}
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X64Reg GetSimpleReg() const
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constexpr X64Reg GetSimpleReg() const
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{
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{
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if (scale == SCALE_NONE)
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return scale == SCALE_NONE
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return (X64Reg)offsetOrBaseReg;
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? static_cast<X64Reg>(offsetOrBaseReg)
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else
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: INVALID_REG;
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return INVALID_REG;
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}
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}
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u32 GetImmValue() const {
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constexpr u32 GetImmValue() const {
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return (u32)offset;
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return static_cast<u32>(offset);
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}
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}
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// For loops.
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// For loops.
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@ -236,11 +236,11 @@ struct OpArg
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}
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}
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private:
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private:
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u8 scale;
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u8 scale = 0;
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u16 offsetOrBaseReg;
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u16 offsetOrBaseReg = 0;
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u16 indexReg;
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u16 indexReg = 0;
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u64 offset; // use RIP-relative as much as possible - 64-bit immediates are not available.
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u64 offset = 0; // use RIP-relative as much as possible - 64-bit immediates are not available.
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u16 operandReg;
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u16 operandReg = 0;
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};
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};
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inline OpArg M(const void *ptr) {return OpArg((u64)ptr, (int)SCALE_RIP);}
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inline OpArg M(const void *ptr) {return OpArg((u64)ptr, (int)SCALE_RIP);}
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