core: Make use of fastmem
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740edacc8d
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621f3f5f47
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@ -1 +1 @@
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Subproject commit 828959caedfac2d456a0c877fda4612e35fffc03
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Subproject commit 0c12614d1a7a72d778609920dde96a4c63074ece
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@ -111,6 +111,8 @@ struct PageTable {
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VirtualBuffer<u64> backing_addr;
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size_t current_address_space_width_in_bits;
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u8* fastmem_arena;
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};
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} // namespace Common
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@ -128,6 +128,7 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
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if (page_table) {
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config.page_table = reinterpret_cast<std::array<std::uint8_t*, NUM_PAGE_TABLE_ENTRIES>*>(
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page_table->pointers.data());
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config.fastmem_pointer = page_table->fastmem_arena;
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}
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config.absolute_offset_page_table = true;
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config.page_table_pointer_mask_bits = Common::PageTable::ATTRIBUTE_BITS;
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@ -160,6 +160,10 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
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config.absolute_offset_page_table = true;
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config.detect_misaligned_access_via_page_table = 16 | 32 | 64 | 128;
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config.only_detect_misalignment_via_page_table_on_page_boundary = true;
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config.fastmem_pointer = page_table->fastmem_arena;
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config.fastmem_address_space_bits = address_space_bits;
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config.silently_mirror_fastmem = false;
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}
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// Multi-process state
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@ -6,7 +6,7 @@
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namespace Core {
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DeviceMemory::DeviceMemory() : buffer{DramMemoryMap::Size} {}
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DeviceMemory::DeviceMemory() : buffer{DramMemoryMap::Size, 1ULL << 39} {}
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DeviceMemory::~DeviceMemory() = default;
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} // namespace Core
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@ -5,7 +5,7 @@
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#pragma once
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#include "common/common_types.h"
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#include "common/virtual_buffer.h"
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#include "common/host_memory.h"
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namespace Core {
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@ -21,27 +21,30 @@ enum : u64 {
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};
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}; // namespace DramMemoryMap
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class DeviceMemory : NonCopyable {
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class DeviceMemory {
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public:
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explicit DeviceMemory();
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~DeviceMemory();
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DeviceMemory& operator=(const DeviceMemory&) = delete;
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DeviceMemory(const DeviceMemory&) = delete;
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template <typename T>
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PAddr GetPhysicalAddr(const T* ptr) const {
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return (reinterpret_cast<uintptr_t>(ptr) - reinterpret_cast<uintptr_t>(buffer.data())) +
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return (reinterpret_cast<uintptr_t>(ptr) -
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reinterpret_cast<uintptr_t>(buffer.BackingBasePointer())) +
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DramMemoryMap::Base;
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}
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u8* GetPointer(PAddr addr) {
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return buffer.data() + (addr - DramMemoryMap::Base);
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return buffer.BackingBasePointer() + (addr - DramMemoryMap::Base);
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}
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const u8* GetPointer(PAddr addr) const {
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return buffer.data() + (addr - DramMemoryMap::Base);
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return buffer.BackingBasePointer() + (addr - DramMemoryMap::Base);
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}
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private:
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Common::VirtualBuffer<u8> buffer;
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Common::HostMemory buffer;
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};
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} // namespace Core
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@ -12,6 +12,7 @@
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/page_table.h"
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#include "common/settings.h"
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#include "common/swap.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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@ -32,6 +33,7 @@ struct Memory::Impl {
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void SetCurrentPageTable(Kernel::KProcess& process, u32 core_id) {
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current_page_table = &process.PageTable().PageTableImpl();
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current_page_table->fastmem_arena = system.DeviceMemory().buffer.VirtualBasePointer();
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const std::size_t address_space_width = process.PageTable().GetAddressSpaceWidth();
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@ -41,13 +43,19 @@ struct Memory::Impl {
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void MapMemoryRegion(Common::PageTable& page_table, VAddr base, u64 size, PAddr target) {
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ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: {:016X}", size);
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ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: {:016X}", base);
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ASSERT_MSG(target >= DramMemoryMap::Base && target < DramMemoryMap::End,
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"Out of bounds target: {:016X}", target);
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MapPages(page_table, base / PAGE_SIZE, size / PAGE_SIZE, target, Common::PageType::Memory);
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system.DeviceMemory().buffer.Map(base, target - DramMemoryMap::Base, size);
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}
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void UnmapRegion(Common::PageTable& page_table, VAddr base, u64 size) {
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ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: {:016X}", size);
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ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: {:016X}", base);
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MapPages(page_table, base / PAGE_SIZE, size / PAGE_SIZE, 0, Common::PageType::Unmapped);
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system.DeviceMemory().buffer.Unmap(base, size);
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}
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bool IsValidVirtualAddress(const Kernel::KProcess& process, const VAddr vaddr) const {
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@ -466,6 +474,10 @@ struct Memory::Impl {
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if (vaddr == 0) {
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return;
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}
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const bool is_read_enable = Settings::IsGPULevelHigh() || !cached;
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system.DeviceMemory().buffer.Protect(vaddr, size, is_read_enable, !cached);
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// Iterate over a contiguous CPU address space, which corresponds to the specified GPU
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// address space, marking the region as un/cached. The region is marked un/cached at a
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// granularity of CPU pages, hence why we iterate on a CPU page basis (note: GPU page size
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