Merge pull request #422 from lioncash/bxj
dyncom: Partially emulate BXJ
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commit
6fad32ea98
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@ -1419,15 +1419,19 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index)
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bx_inst));
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bx_inst *inst_cream = (bx_inst *)inst_base->component;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = INDIRECT_BRANCH;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = INDIRECT_BRANCH;
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inst_cream->Rm = BITS(inst, 0, 3);
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inst_cream->Rm = BITS(inst, 0, 3);
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return inst_base;
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("BXJ"); }
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ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index)
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{
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return INTERPRETER_TRANSLATE(bx)(inst, index);
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst));
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cdp_inst *inst_cream = (cdp_inst *)inst_base->component;
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@ -4129,22 +4133,35 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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INC_PC(sizeof(blx_inst));
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goto DISPATCH;
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}
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BX_INST:
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BXJ_INST:
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{
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bx_inst *inst_cream = (bx_inst *)inst_base->component;
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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// Note that only the 'fail' case of BXJ is emulated. This is because
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// the facilities for Jazelle emulation are not implemented.
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//
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// According to the ARM documentation on BXJ, if setting the J bit in the APSR
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// fails, then BXJ functions identically like a regular BX instruction.
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//
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// This is sufficient for citra, as the CPU for the 3DS does not implement Jazelle.
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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bx_inst* const inst_cream = (bx_inst*)inst_base->component;
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if (inst_cream->Rm == 15)
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LOG_WARNING(Core_ARM11, "BX at pc %x: use of Rm = R15 is discouraged", cpu->Reg[15]);
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cpu->TFlag = cpu->Reg[inst_cream->Rm] & 0x1;
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cpu->Reg[15] = cpu->Reg[inst_cream->Rm] & 0xfffffffe;
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INC_PC(sizeof(bx_inst));
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goto DISPATCH;
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(bx_inst));
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goto DISPATCH;
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}
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BXJ_INST:
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CDP_INST:
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{
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cdp_inst *inst_cream = (cdp_inst *)inst_base->component;
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