fixed_pipeline_cache: Use dirty flags to lazily update key
Use dirty flags to avoid building pipeline key from scratch on each draw call. This saves a bit of unnecesary work on each draw call.
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95722823b9
commit
70353649d7
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@ -12,14 +12,15 @@
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#include "common/cityhash.h"
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#include "common/common_types.h"
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#include "video_core/renderer_vulkan/fixed_pipeline_state.h"
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#include "video_core/renderer_vulkan/vk_state_tracker.h"
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namespace Vulkan {
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namespace {
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constexpr std::size_t POINT = 0;
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constexpr std::size_t LINE = 1;
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constexpr std::size_t POLYGON = 2;
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constexpr size_t POINT = 0;
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constexpr size_t LINE = 1;
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constexpr size_t POLYGON = 2;
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constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
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POINT, // Points
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LINE, // Lines
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@ -40,10 +41,14 @@ constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
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} // Anonymous namespace
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void FixedPipelineState::Fill(const Maxwell& regs, bool has_extended_dynamic_state) {
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const std::array enabled_lut = {regs.polygon_offset_point_enable,
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regs.polygon_offset_line_enable,
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regs.polygon_offset_fill_enable};
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void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
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bool has_extended_dynamic_state) {
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const Maxwell& regs = maxwell3d.regs;
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const std::array enabled_lut{
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regs.polygon_offset_point_enable,
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regs.polygon_offset_line_enable,
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regs.polygon_offset_fill_enable,
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};
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const u32 topology_index = static_cast<u32>(regs.draw.topology.Value());
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raw1 = 0;
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@ -64,45 +69,53 @@ void FixedPipelineState::Fill(const Maxwell& regs, bool has_extended_dynamic_sta
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raw2 = 0;
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const auto test_func =
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regs.alpha_test_enabled == 1 ? regs.alpha_test_func : Maxwell::ComparisonOp::Always;
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regs.alpha_test_enabled != 0 ? regs.alpha_test_func : Maxwell::ComparisonOp::Always;
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alpha_test_func.Assign(PackComparisonOp(test_func));
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early_z.Assign(regs.force_early_fragment_tests != 0 ? 1 : 0);
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alpha_test_ref = Common::BitCast<u32>(regs.alpha_test_ref);
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point_size = Common::BitCast<u32>(regs.point_size);
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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binding_divisors[index] =
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regs.instanced_arrays.IsInstancingEnabled(index) ? regs.vertex_array[index].divisor : 0;
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if (maxwell3d.dirty.flags[Dirty::InstanceDivisors]) {
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maxwell3d.dirty.flags[Dirty::InstanceDivisors] = false;
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for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const bool is_enabled = regs.instanced_arrays.IsInstancingEnabled(index);
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binding_divisors[index] = is_enabled ? regs.vertex_array[index].divisor : 0;
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}
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}
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for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
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const auto& input = regs.vertex_attrib_format[index];
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auto& attribute = attributes[index];
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attribute.raw = 0;
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attribute.enabled.Assign(input.IsConstant() ? 0 : 1);
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attribute.buffer.Assign(input.buffer);
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attribute.offset.Assign(input.offset);
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attribute.type.Assign(static_cast<u32>(input.type.Value()));
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attribute.size.Assign(static_cast<u32>(input.size.Value()));
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attribute.binding_index_enabled.Assign(regs.vertex_array[index].IsEnabled() ? 1 : 0);
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if (maxwell3d.dirty.flags[Dirty::VertexAttributes]) {
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maxwell3d.dirty.flags[Dirty::VertexAttributes] = false;
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for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
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const auto& input = regs.vertex_attrib_format[index];
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auto& attribute = attributes[index];
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attribute.raw = 0;
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attribute.enabled.Assign(input.IsConstant() ? 0 : 1);
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attribute.buffer.Assign(input.buffer);
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attribute.offset.Assign(input.offset);
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attribute.type.Assign(static_cast<u32>(input.type.Value()));
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attribute.size.Assign(static_cast<u32>(input.size.Value()));
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}
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}
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for (std::size_t index = 0; index < std::size(attachments); ++index) {
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attachments[index].Fill(regs, index);
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if (maxwell3d.dirty.flags[Dirty::Blending]) {
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maxwell3d.dirty.flags[Dirty::Blending] = false;
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for (size_t index = 0; index < attachments.size(); ++index) {
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attachments[index].Refresh(regs, index);
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}
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}
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if (maxwell3d.dirty.flags[Dirty::ViewportSwizzles]) {
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maxwell3d.dirty.flags[Dirty::ViewportSwizzles] = false;
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const auto& transform = regs.viewport_transform;
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std::ranges::transform(transform, viewport_swizzles.begin(), [](const auto& viewport) {
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return static_cast<u16>(viewport.swizzle.raw);
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});
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}
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const auto& transform = regs.viewport_transform;
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std::transform(transform.begin(), transform.end(), viewport_swizzles.begin(),
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[](const auto& viewport) { return static_cast<u16>(viewport.swizzle.raw); });
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if (!has_extended_dynamic_state) {
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no_extended_dynamic_state.Assign(1);
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dynamic_state.Fill(regs);
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dynamic_state.Refresh(regs);
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}
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}
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void FixedPipelineState::BlendingAttachment::Fill(const Maxwell& regs, std::size_t index) {
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void FixedPipelineState::BlendingAttachment::Refresh(const Maxwell& regs, size_t index) {
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const auto& mask = regs.color_mask[regs.color_mask_common ? 0 : index];
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raw = 0;
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@ -141,7 +154,7 @@ void FixedPipelineState::BlendingAttachment::Fill(const Maxwell& regs, std::size
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enable.Assign(1);
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}
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void FixedPipelineState::DynamicState::Fill(const Maxwell& regs) {
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void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) {
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u32 packed_front_face = PackFrontFace(regs.front_face);
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if (regs.screen_y_control.triangle_rast_flip != 0) {
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// Flip front face
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@ -178,9 +191,9 @@ void FixedPipelineState::DynamicState::Fill(const Maxwell& regs) {
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});
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}
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std::size_t FixedPipelineState::Hash() const noexcept {
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size_t FixedPipelineState::Hash() const noexcept {
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const u64 hash = Common::CityHash64(reinterpret_cast<const char*>(this), Size());
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return static_cast<std::size_t>(hash);
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return static_cast<size_t>(hash);
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}
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bool FixedPipelineState::operator==(const FixedPipelineState& rhs) const noexcept {
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@ -58,7 +58,7 @@ struct FixedPipelineState {
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BitField<30, 1, u32> enable;
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};
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void Fill(const Maxwell& regs, std::size_t index);
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void Refresh(const Maxwell& regs, size_t index);
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constexpr std::array<bool, 4> Mask() const noexcept {
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return {mask_r != 0, mask_g != 0, mask_b != 0, mask_a != 0};
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@ -96,8 +96,6 @@ struct FixedPipelineState {
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BitField<6, 14, u32> offset;
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BitField<20, 3, u32> type;
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BitField<23, 6, u32> size;
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// Not really an element of a vertex attribute, but it can be packed here
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BitField<29, 1, u32> binding_index_enabled;
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constexpr Maxwell::VertexAttribute::Type Type() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Type>(type.Value());
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@ -108,7 +106,7 @@ struct FixedPipelineState {
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}
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};
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template <std::size_t Position>
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template <size_t Position>
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union StencilFace {
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BitField<Position + 0, 3, u32> action_stencil_fail;
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BitField<Position + 3, 3, u32> action_depth_fail;
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@ -152,7 +150,7 @@ struct FixedPipelineState {
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// Vertex stride is a 12 bits value, we have 4 bits to spare per element
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std::array<u16, Maxwell::NumVertexArrays> vertex_strides;
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void Fill(const Maxwell& regs);
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void Refresh(const Maxwell& regs);
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Maxwell::ComparisonOp DepthTestFunc() const noexcept {
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return UnpackComparisonOp(depth_test_func);
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@ -199,9 +197,9 @@ struct FixedPipelineState {
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std::array<u16, Maxwell::NumViewports> viewport_swizzles;
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DynamicState dynamic_state;
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void Fill(const Maxwell& regs, bool has_extended_dynamic_state);
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void Refresh(Tegra::Engines::Maxwell3D& maxwell3d, bool has_extended_dynamic_state);
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std::size_t Hash() const noexcept;
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size_t Hash() const noexcept;
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bool operator==(const FixedPipelineState& rhs) const noexcept;
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@ -209,8 +207,8 @@ struct FixedPipelineState {
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return !operator==(rhs);
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}
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std::size_t Size() const noexcept {
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const std::size_t total_size = sizeof *this;
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size_t Size() const noexcept {
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const size_t total_size = sizeof *this;
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return total_size - (no_extended_dynamic_state != 0 ? 0 : sizeof(DynamicState));
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}
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};
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@ -224,7 +222,7 @@ namespace std {
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template <>
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struct hash<Vulkan::FixedPipelineState> {
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std::size_t operator()(const Vulkan::FixedPipelineState& k) const noexcept {
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size_t operator()(const Vulkan::FixedPipelineState& k) const noexcept {
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return k.Hash();
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}
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};
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@ -221,9 +221,6 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const SPIRVProgram& program,
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std::vector<VkVertexInputBindingDescription> vertex_bindings;
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std::vector<VkVertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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if (state.attributes[index].binding_index_enabled == 0) {
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continue;
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}
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const bool instanced = state.binding_divisors[index] != 0;
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const auto rate = instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
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vertex_bindings.push_back({
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@ -267,8 +267,7 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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query_cache.UpdateCounters();
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GraphicsPipelineCacheKey key;
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key.fixed_state.Fill(maxwell3d.regs, device.IsExtExtendedDynamicStateSupported());
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graphics_key.fixed_state.Refresh(maxwell3d, device.IsExtExtendedDynamicStateSupported());
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std::scoped_lock lock{buffer_cache.mutex, texture_cache.mutex};
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@ -276,14 +275,16 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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texture_cache.UpdateRenderTargets(false);
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const auto shaders = pipeline_cache.GetShaders();
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key.shaders = GetShaderAddresses(shaders);
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graphics_key.shaders = GetShaderAddresses(shaders);
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graphics_key.shaders = GetShaderAddresses(shaders);
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SetupShaderDescriptors(shaders, is_indexed);
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const Framebuffer* const framebuffer = texture_cache.GetFramebuffer();
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key.renderpass = framebuffer->RenderPass();
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graphics_key.renderpass = framebuffer->RenderPass();
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auto* const pipeline =
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pipeline_cache.GetGraphicsPipeline(key, framebuffer->NumColorBuffers(), async_shaders);
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VKGraphicsPipeline* const pipeline = pipeline_cache.GetGraphicsPipeline(
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graphics_key, framebuffer->NumColorBuffers(), async_shaders);
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if (pipeline == nullptr || pipeline->GetHandle() == VK_NULL_HANDLE) {
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// Async graphics pipeline was not ready.
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return;
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@ -20,6 +20,7 @@
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#include "video_core/renderer_vulkan/vk_buffer_cache.h"
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#include "video_core/renderer_vulkan/vk_descriptor_pool.h"
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#include "video_core/renderer_vulkan/vk_fence_manager.h"
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#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
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#include "video_core/renderer_vulkan/vk_pipeline_cache.h"
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#include "video_core/renderer_vulkan/vk_query_cache.h"
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#include "video_core/renderer_vulkan/vk_scheduler.h"
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@ -173,6 +174,8 @@ private:
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VKUpdateDescriptorQueue update_descriptor_queue;
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BlitImageHelper blit_image;
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GraphicsPipelineCacheKey graphics_key;
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TextureCacheRuntime texture_cache_runtime;
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TextureCache texture_cache;
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BufferCacheRuntime buffer_cache_runtime;
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@ -18,9 +18,7 @@
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#define NUM(field_name) (sizeof(Maxwell3D::Regs::field_name) / (sizeof(u32)))
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namespace Vulkan {
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namespace {
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using namespace Dirty;
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using namespace VideoCommon::Dirty;
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using Tegra::Engines::Maxwell3D;
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@ -128,6 +126,34 @@ void SetupDirtyStencilTestEnable(Tables& tables) {
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tables[0][OFF(stencil_enable)] = StencilTestEnable;
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}
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void SetupDirtyBlending(Tables& tables) {
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tables[0][OFF(color_mask_common)] = Blending;
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tables[0][OFF(independent_blend_enable)] = Blending;
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FillBlock(tables[0], OFF(color_mask), NUM(color_mask), Blending);
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FillBlock(tables[0], OFF(blend), NUM(blend), Blending);
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FillBlock(tables[0], OFF(independent_blend), NUM(independent_blend), Blending);
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}
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void SetupDirtyInstanceDivisors(Tables& tables) {
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static constexpr size_t divisor_offset = 3;
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for (size_t index = 0; index < Regs::NumVertexArrays; ++index) {
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tables[0][OFF(instanced_arrays) + index] = InstanceDivisors;
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tables[0][OFF(vertex_array) + index * NUM(vertex_array[0]) + divisor_offset] =
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InstanceDivisors;
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}
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}
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void SetupDirtyVertexAttributes(Tables& tables) {
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FillBlock(tables[0], OFF(vertex_attrib_format), NUM(vertex_attrib_format), VertexAttributes);
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}
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void SetupDirtyViewportSwizzles(Tables& tables) {
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static constexpr size_t swizzle_offset = 6;
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for (size_t index = 0; index < Regs::NumViewports; ++index) {
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tables[0][OFF(viewport_transform) + index * NUM(viewport_transform[0]) + swizzle_offset] =
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ViewportSwizzles;
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}
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}
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} // Anonymous namespace
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StateTracker::StateTracker(Tegra::GPU& gpu)
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SetupDirtyFrontFace(tables);
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SetupDirtyStencilOp(tables);
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SetupDirtyStencilTestEnable(tables);
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SetupDirtyBlending(tables);
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SetupDirtyInstanceDivisors(tables);
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SetupDirtyVertexAttributes(tables);
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SetupDirtyViewportSwizzles(tables);
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}
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} // namespace Vulkan
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@ -35,6 +35,11 @@ enum : u8 {
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StencilOp,
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StencilTestEnable,
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Blending,
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InstanceDivisors,
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VertexAttributes,
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ViewportSwizzles,
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Last
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};
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static_assert(Last <= std::numeric_limits<u8>::max());
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