shader: Move loop safety tests to code emission
This commit is contained in:
parent
3877918e96
commit
808ef97a08
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@ -71,6 +71,7 @@ public:
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std::string_view stage_name = "invalid";
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std::string_view stage_name = "invalid";
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std::string_view attrib_name = "invalid";
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std::string_view attrib_name = "invalid";
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u32 num_safety_loop_vars{};
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bool uses_y_direction{};
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bool uses_y_direction{};
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};
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};
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@ -6,6 +6,8 @@
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#include <string>
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#include <string>
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#include <tuple>
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#include <tuple>
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#include "common/div_ceil.h"
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#include "common/settings.h"
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#include "shader_recompiler/backend/bindings.h"
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#include "shader_recompiler/backend/bindings.h"
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/emit_glasm.h"
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#include "shader_recompiler/backend/glasm/emit_glasm.h"
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@ -222,6 +224,14 @@ void EmitCode(EmitContext& ctx, const IR::Program& program) {
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ctx.Add("REP;");
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ctx.Add("REP;");
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break;
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break;
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case IR::AbstractSyntaxNode::Type::Repeat:
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case IR::AbstractSyntaxNode::Type::Repeat:
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if (!Settings::values.disable_shader_loop_safety_checks) {
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const u32 loop_index{ctx.num_safety_loop_vars++};
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const u32 vector_index{loop_index / 4};
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const char component{"xyzw"[loop_index % 4]};
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ctx.Add("SUB.S.CC loop{}.{},loop{}.{},1;"
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"BRK(LT.{});",
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vector_index, component, vector_index, component, component);
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}
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if (node.data.repeat.cond.IsImmediate()) {
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if (node.data.repeat.cond.IsImmediate()) {
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if (node.data.repeat.cond.U1()) {
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if (node.data.repeat.cond.U1()) {
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ctx.Add("ENDREP;");
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ctx.Add("ENDREP;");
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@ -425,6 +435,10 @@ std::string EmitGLASM(const Profile& profile, const RuntimeInfo& runtime_info, I
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if (program.info.uses_fswzadd) {
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if (program.info.uses_fswzadd) {
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header += "FSWZA[4],FSWZB[4],";
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header += "FSWZA[4],FSWZB[4],";
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}
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}
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const u32 num_safety_loop_vectors{Common::DivCeil(ctx.num_safety_loop_vars, 4u)};
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for (u32 index = 0; index < num_safety_loop_vectors; ++index) {
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header += fmt::format("loop{},", index);
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}
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header += "RC;"
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header += "RC;"
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"LONG TEMP ";
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"LONG TEMP ";
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for (size_t index = 0; index < ctx.reg_alloc.NumUsedLongRegisters(); ++index) {
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for (size_t index = 0; index < ctx.reg_alloc.NumUsedLongRegisters(); ++index) {
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@ -441,6 +455,9 @@ std::string EmitGLASM(const Profile& profile, const RuntimeInfo& runtime_info, I
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"MOV.F FSWZB[2],1;"
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"MOV.F FSWZB[2],1;"
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"MOV.F FSWZB[3],-1;";
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"MOV.F FSWZB[3],-1;";
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}
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}
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for (u32 index = 0; index < num_safety_loop_vectors; ++index) {
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header += fmt::format("MOV.S loop{},{{0x2000,0x2000,0x2000,0x2000}};", index);
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}
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if (ctx.uses_y_direction) {
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if (ctx.uses_y_direction) {
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header += "PARAM y_direction[1]={state.material.front.ambient};";
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header += "PARAM y_direction[1]={state.material.front.ambient};";
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}
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}
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@ -42,8 +42,6 @@ void EmitSetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitSetIndirectBranchVariable(EmitContext& ctx);
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void EmitSetIndirectBranchVariable(EmitContext& ctx);
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void EmitGetIndirectBranchVariable(EmitContext& ctx);
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void EmitGetIndirectBranchVariable(EmitContext& ctx);
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void EmitSetLoopSafetyVariable(EmitContext& ctx);
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void EmitGetLoopSafetyVariable(EmitContext& ctx);
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void EmitGetCbufU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset);
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void EmitGetCbufU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset);
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void EmitGetCbufS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset);
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void EmitGetCbufS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset);
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void EmitGetCbufU16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset);
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void EmitGetCbufU16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset);
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@ -153,14 +153,6 @@ void EmitGetIndirectBranchVariable(EmitContext& ctx) {
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NotImplemented();
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NotImplemented();
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}
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}
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void EmitSetLoopSafetyVariable(EmitContext& ctx) {
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NotImplemented();
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}
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void EmitGetLoopSafetyVariable(EmitContext& ctx) {
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NotImplemented();
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}
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void EmitGetZFlag(EmitContext& ctx) {
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void EmitGetZFlag(EmitContext& ctx) {
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NotImplemented();
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NotImplemented();
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}
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}
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@ -153,6 +153,8 @@ public:
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std::vector<TextureImageDefinition> images;
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std::vector<TextureImageDefinition> images;
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std::array<std::array<GenericElementInfo, 4>, 32> output_generics{};
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std::array<std::array<GenericElementInfo, 4>, 32> output_generics{};
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u32 num_safety_loop_vars{};
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bool uses_y_direction{};
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bool uses_y_direction{};
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bool uses_cc_carry{};
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bool uses_cc_carry{};
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@ -6,6 +6,7 @@
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#include <string>
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#include <string>
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#include "common/alignment.h"
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#include "common/alignment.h"
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#include "common/settings.h"
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#include "shader_recompiler/backend/glsl/emit_context.h"
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#include "shader_recompiler/backend/glsl/emit_context.h"
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#include "shader_recompiler/backend/glsl/emit_glsl.h"
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#include "shader_recompiler/backend/glsl/emit_glsl.h"
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#include "shader_recompiler/backend/glsl/emit_glsl_instructions.h"
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#include "shader_recompiler/backend/glsl/emit_glsl_instructions.h"
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@ -156,7 +157,12 @@ void EmitCode(EmitContext& ctx, const IR::Program& program) {
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ctx.Add("for(;;){{");
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ctx.Add("for(;;){{");
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break;
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break;
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case IR::AbstractSyntaxNode::Type::Repeat:
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case IR::AbstractSyntaxNode::Type::Repeat:
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if (Settings::values.disable_shader_loop_safety_checks) {
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ctx.Add("if(!{}){{break;}}}}", ctx.var_alloc.Consume(node.data.repeat.cond));
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ctx.Add("if(!{}){{break;}}}}", ctx.var_alloc.Consume(node.data.repeat.cond));
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} else {
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ctx.Add("if(--loop{}<0 || !{}){{break;}}}}", ctx.num_safety_loop_vars++,
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ctx.var_alloc.Consume(node.data.repeat.cond));
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}
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break;
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break;
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default:
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default:
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throw NotImplementedException("AbstractSyntaxNode Type {}", node.type);
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throw NotImplementedException("AbstractSyntaxNode Type {}", node.type);
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@ -198,6 +204,9 @@ void DefineVariables(const EmitContext& ctx, std::string& header) {
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ctx.var_alloc.Representation(index, type), type_name);
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ctx.var_alloc.Representation(index, type), type_name);
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}
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}
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}
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}
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for (u32 i = 0; i < ctx.num_safety_loop_vars; ++i) {
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header += fmt::format("int loop{}=0x2000;", i);
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}
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}
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}
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} // Anonymous namespace
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} // Anonymous namespace
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@ -44,8 +44,6 @@ void EmitSetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitSetIndirectBranchVariable(EmitContext& ctx);
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void EmitSetIndirectBranchVariable(EmitContext& ctx);
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void EmitGetIndirectBranchVariable(EmitContext& ctx);
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void EmitGetIndirectBranchVariable(EmitContext& ctx);
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void EmitSetLoopSafetyVariable(EmitContext& ctx);
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void EmitGetLoopSafetyVariable(EmitContext& ctx);
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void EmitGetCbufU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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void EmitGetCbufU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset);
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const IR::Value& offset);
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void EmitGetCbufS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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void EmitGetCbufS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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@ -46,14 +46,6 @@ void EmitGetIndirectBranchVariable(EmitContext& ctx) {
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NotImplemented();
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NotImplemented();
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}
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}
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void EmitSetLoopSafetyVariable(EmitContext& ctx) {
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NotImplemented();
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}
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void EmitGetLoopSafetyVariable(EmitContext& ctx) {
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NotImplemented();
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}
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void EmitGetZFlag(EmitContext& ctx) {
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void EmitGetZFlag(EmitContext& ctx) {
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NotImplemented();
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NotImplemented();
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}
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}
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@ -8,6 +8,7 @@
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#include <utility>
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#include <utility>
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#include <vector>
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#include <vector>
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#include "common/settings.h"
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
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#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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@ -151,9 +152,25 @@ void Traverse(EmitContext& ctx, IR::Program& program) {
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}
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}
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break;
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break;
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case IR::AbstractSyntaxNode::Type::Repeat: {
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case IR::AbstractSyntaxNode::Type::Repeat: {
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Id cond{ctx.Def(node.data.repeat.cond)};
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if (!Settings::values.disable_shader_loop_safety_checks) {
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const Id pointer_type{ctx.TypePointer(spv::StorageClass::Private, ctx.U32[1])};
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const Id safety_counter{ctx.AddGlobalVariable(
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pointer_type, spv::StorageClass::Private, ctx.Const(0x2000u))};
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if (ctx.profile.supported_spirv >= 0x00010400) {
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ctx.interfaces.push_back(safety_counter);
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}
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const Id old_counter{ctx.OpLoad(ctx.U32[1], safety_counter)};
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const Id new_counter{ctx.OpISub(ctx.U32[1], old_counter, ctx.Const(1u))};
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ctx.OpStore(safety_counter, new_counter);
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const Id safety_cond{
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ctx.OpSGreaterThanEqual(ctx.U1, new_counter, ctx.u32_zero_value)};
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cond = ctx.OpLogicalAnd(ctx.U1, cond, safety_cond);
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}
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const Id loop_header_label{node.data.repeat.loop_header->Definition<Id>()};
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const Id loop_header_label{node.data.repeat.loop_header->Definition<Id>()};
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const Id merge_label{node.data.repeat.merge->Definition<Id>()};
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const Id merge_label{node.data.repeat.merge->Definition<Id>()};
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ctx.OpBranchConditional(ctx.Def(node.data.repeat.cond), loop_header_label, merge_label);
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ctx.OpBranchConditional(cond, loop_header_label, merge_label);
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break;
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break;
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}
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}
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case IR::AbstractSyntaxNode::Type::Return:
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case IR::AbstractSyntaxNode::Type::Return:
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@ -198,14 +198,6 @@ void EmitGetIndirectBranchVariable(EmitContext&) {
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throw LogicError("Unreachable instruction");
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throw LogicError("Unreachable instruction");
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}
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}
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void EmitSetLoopSafetyVariable(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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void EmitGetLoopSafetyVariable(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
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if (ctx.profile.support_descriptor_aliasing && ctx.profile.support_int8) {
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if (ctx.profile.support_descriptor_aliasing && ctx.profile.support_int8) {
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const Id load{GetCbuf(ctx, ctx.U8, &UniformDefinitions::U8, sizeof(u8), binding, offset)};
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const Id load{GetCbuf(ctx, ctx.U8, &UniformDefinitions::U8, sizeof(u8), binding, offset)};
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@ -43,8 +43,6 @@ void EmitSetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitSetIndirectBranchVariable(EmitContext& ctx);
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void EmitSetIndirectBranchVariable(EmitContext& ctx);
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void EmitGetIndirectBranchVariable(EmitContext& ctx);
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void EmitGetIndirectBranchVariable(EmitContext& ctx);
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void EmitSetLoopSafetyVariable(EmitContext& ctx);
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void EmitGetLoopSafetyVariable(EmitContext& ctx);
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Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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@ -147,14 +147,6 @@ void IREmitter::SetIndirectBranchVariable(const U32& value) {
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Inst(Opcode::SetIndirectBranchVariable, value);
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Inst(Opcode::SetIndirectBranchVariable, value);
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}
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}
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U32 IREmitter::GetLoopSafetyVariable(u32 id) {
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return Inst<U32>(Opcode::GetLoopSafetyVariable, id);
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}
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void IREmitter::SetLoopSafetyVariable(u32 id, const U32& counter) {
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Inst(Opcode::SetLoopSafetyVariable, id, counter);
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}
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U32 IREmitter::GetCbuf(const U32& binding, const U32& byte_offset) {
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U32 IREmitter::GetCbuf(const U32& binding, const U32& byte_offset) {
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return Inst<U32>(Opcode::GetCbufU32, binding, byte_offset);
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return Inst<U32>(Opcode::GetCbufU32, binding, byte_offset);
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}
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}
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@ -55,9 +55,6 @@ public:
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[[nodiscard]] U32 GetIndirectBranchVariable();
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[[nodiscard]] U32 GetIndirectBranchVariable();
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void SetIndirectBranchVariable(const U32& value);
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void SetIndirectBranchVariable(const U32& value);
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[[nodiscard]] U32 GetLoopSafetyVariable(u32 id);
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void SetLoopSafetyVariable(u32 id, const U32& counter);
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[[nodiscard]] U32 GetCbuf(const U32& binding, const U32& byte_offset);
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[[nodiscard]] U32 GetCbuf(const U32& binding, const U32& byte_offset);
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[[nodiscard]] Value GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
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[[nodiscard]] Value GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
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bool is_signed);
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bool is_signed);
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@ -32,8 +32,6 @@ OPCODE(GetGotoVariable, U1, U32,
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OPCODE(SetGotoVariable, Void, U32, U1, )
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OPCODE(SetGotoVariable, Void, U32, U1, )
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OPCODE(GetIndirectBranchVariable, U32, )
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OPCODE(GetIndirectBranchVariable, U32, )
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OPCODE(SetIndirectBranchVariable, Void, U32, )
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OPCODE(SetIndirectBranchVariable, Void, U32, )
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OPCODE(GetLoopSafetyVariable, U32, U32, )
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OPCODE(SetLoopSafetyVariable, Void, U32, U32, )
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OPCODE(GetCbufU8, U32, U32, U32, )
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OPCODE(GetCbufU8, U32, U32, U32, )
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OPCODE(GetCbufS8, U32, U32, U32, )
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OPCODE(GetCbufS8, U32, U32, U32, )
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OPCODE(GetCbufU16, U32, U32, U32, )
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OPCODE(GetCbufU16, U32, U32, U32, )
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@ -15,7 +15,6 @@
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#include <boost/intrusive/list.hpp>
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#include <boost/intrusive/list.hpp>
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#include "common/settings.h"
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#include "shader_recompiler/environment.h"
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#include "shader_recompiler/environment.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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@ -663,7 +662,7 @@ public:
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Visit(root_stmt, nullptr, nullptr);
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Visit(root_stmt, nullptr, nullptr);
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IR::Block& first_block{*syntax_list.front().data.block};
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IR::Block& first_block{*syntax_list.front().data.block};
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IR::IREmitter ir = IR::IREmitter(first_block, first_block.begin());
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IR::IREmitter ir(first_block, first_block.begin());
|
||||||
ir.Prologue();
|
ir.Prologue();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -741,28 +740,9 @@ private:
|
||||||
}
|
}
|
||||||
case StatementType::Loop: {
|
case StatementType::Loop: {
|
||||||
IR::Block* const loop_header_block{block_pool.Create(inst_pool)};
|
IR::Block* const loop_header_block{block_pool.Create(inst_pool)};
|
||||||
const u32 this_loop_id{loop_id++};
|
|
||||||
|
|
||||||
if (Settings::values.disable_shader_loop_safety_checks) {
|
|
||||||
if (current_block) {
|
if (current_block) {
|
||||||
current_block->AddBranch(loop_header_block);
|
current_block->AddBranch(loop_header_block);
|
||||||
}
|
}
|
||||||
} else {
|
|
||||||
IR::Block* const init_block{block_pool.Create(inst_pool)};
|
|
||||||
IR::IREmitter ir{*init_block};
|
|
||||||
|
|
||||||
static constexpr u32 SAFETY_THRESHOLD = 0x1000;
|
|
||||||
ir.SetLoopSafetyVariable(this_loop_id, ir.Imm32(SAFETY_THRESHOLD));
|
|
||||||
|
|
||||||
if (current_block) {
|
|
||||||
current_block->AddBranch(init_block);
|
|
||||||
}
|
|
||||||
init_block->AddBranch(loop_header_block);
|
|
||||||
|
|
||||||
auto& init_node{syntax_list.emplace_back()};
|
|
||||||
init_node.type = IR::AbstractSyntaxNode::Type::Block;
|
|
||||||
init_node.data.block = init_block;
|
|
||||||
}
|
|
||||||
auto& header_node{syntax_list.emplace_back()};
|
auto& header_node{syntax_list.emplace_back()};
|
||||||
header_node.type = IR::AbstractSyntaxNode::Type::Block;
|
header_node.type = IR::AbstractSyntaxNode::Type::Block;
|
||||||
header_node.data.block = loop_header_block;
|
header_node.data.block = loop_header_block;
|
||||||
|
@ -779,16 +759,7 @@ private:
|
||||||
|
|
||||||
// The continue block is located at the end of the loop
|
// The continue block is located at the end of the loop
|
||||||
IR::IREmitter ir{*continue_block};
|
IR::IREmitter ir{*continue_block};
|
||||||
IR::U1 cond{VisitExpr(ir, *stmt.cond)};
|
const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
|
||||||
if (!Settings::values.disable_shader_loop_safety_checks) {
|
|
||||||
const IR::U32 old_counter{ir.GetLoopSafetyVariable(this_loop_id)};
|
|
||||||
const IR::U32 new_counter{ir.ISub(old_counter, ir.Imm32(1))};
|
|
||||||
ir.SetLoopSafetyVariable(this_loop_id, new_counter);
|
|
||||||
|
|
||||||
const IR::U1 safety_cond{ir.INotEqual(new_counter, ir.Imm32(0))};
|
|
||||||
cond = ir.LogicalAnd(cond, safety_cond);
|
|
||||||
}
|
|
||||||
cond = ir.ConditionRef(cond);
|
|
||||||
|
|
||||||
IR::Block* const body_block{syntax_list.at(body_block_index).data.block};
|
IR::Block* const body_block{syntax_list.at(body_block_index).data.block};
|
||||||
loop_header_block->AddBranch(body_block);
|
loop_header_block->AddBranch(body_block);
|
||||||
|
|
|
@ -48,22 +48,12 @@ struct GotoVariable : FlagTag {
|
||||||
u32 index;
|
u32 index;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct LoopSafetyVariable {
|
|
||||||
LoopSafetyVariable() = default;
|
|
||||||
explicit LoopSafetyVariable(u32 index_) : index{index_} {}
|
|
||||||
|
|
||||||
auto operator<=>(const LoopSafetyVariable&) const noexcept = default;
|
|
||||||
|
|
||||||
u32 index;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct IndirectBranchVariable {
|
struct IndirectBranchVariable {
|
||||||
auto operator<=>(const IndirectBranchVariable&) const noexcept = default;
|
auto operator<=>(const IndirectBranchVariable&) const noexcept = default;
|
||||||
};
|
};
|
||||||
|
|
||||||
using Variant =
|
using Variant = std::variant<IR::Reg, IR::Pred, ZeroFlagTag, SignFlagTag, CarryFlagTag,
|
||||||
std::variant<IR::Reg, IR::Pred, ZeroFlagTag, SignFlagTag, CarryFlagTag, OverflowFlagTag,
|
OverflowFlagTag, GotoVariable, IndirectBranchVariable>;
|
||||||
GotoVariable, LoopSafetyVariable, IndirectBranchVariable>;
|
|
||||||
using ValueMap = boost::container::flat_map<IR::Block*, IR::Value>;
|
using ValueMap = boost::container::flat_map<IR::Block*, IR::Value>;
|
||||||
|
|
||||||
struct DefTable {
|
struct DefTable {
|
||||||
|
@ -88,13 +78,6 @@ struct DefTable {
|
||||||
goto_vars[variable.index].insert_or_assign(block, value);
|
goto_vars[variable.index].insert_or_assign(block, value);
|
||||||
}
|
}
|
||||||
|
|
||||||
const IR::Value& Def(IR::Block* block, LoopSafetyVariable variable) {
|
|
||||||
return loop_safety_vars[variable.index][block];
|
|
||||||
}
|
|
||||||
void SetDef(IR::Block* block, LoopSafetyVariable variable, const IR::Value& value) {
|
|
||||||
loop_safety_vars[variable.index].insert_or_assign(block, value);
|
|
||||||
}
|
|
||||||
|
|
||||||
const IR::Value& Def(IR::Block* block, IndirectBranchVariable) {
|
const IR::Value& Def(IR::Block* block, IndirectBranchVariable) {
|
||||||
return indirect_branch_var[block];
|
return indirect_branch_var[block];
|
||||||
}
|
}
|
||||||
|
@ -132,7 +115,6 @@ struct DefTable {
|
||||||
|
|
||||||
std::array<ValueMap, IR::NUM_USER_PREDS> preds;
|
std::array<ValueMap, IR::NUM_USER_PREDS> preds;
|
||||||
boost::container::flat_map<u32, ValueMap> goto_vars;
|
boost::container::flat_map<u32, ValueMap> goto_vars;
|
||||||
boost::container::flat_map<u32, ValueMap> loop_safety_vars;
|
|
||||||
ValueMap indirect_branch_var;
|
ValueMap indirect_branch_var;
|
||||||
ValueMap zero_flag;
|
ValueMap zero_flag;
|
||||||
ValueMap sign_flag;
|
ValueMap sign_flag;
|
||||||
|
@ -152,10 +134,6 @@ IR::Opcode UndefOpcode(const FlagTag&) noexcept {
|
||||||
return IR::Opcode::UndefU1;
|
return IR::Opcode::UndefU1;
|
||||||
}
|
}
|
||||||
|
|
||||||
IR::Opcode UndefOpcode(const LoopSafetyVariable&) noexcept {
|
|
||||||
return IR::Opcode::UndefU32;
|
|
||||||
}
|
|
||||||
|
|
||||||
IR::Opcode UndefOpcode(IndirectBranchVariable) noexcept {
|
IR::Opcode UndefOpcode(IndirectBranchVariable) noexcept {
|
||||||
return IR::Opcode::UndefU32;
|
return IR::Opcode::UndefU32;
|
||||||
}
|
}
|
||||||
|
@ -337,9 +315,6 @@ void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
|
||||||
case IR::Opcode::SetGotoVariable:
|
case IR::Opcode::SetGotoVariable:
|
||||||
pass.WriteVariable(GotoVariable{inst.Arg(0).U32()}, block, inst.Arg(1));
|
pass.WriteVariable(GotoVariable{inst.Arg(0).U32()}, block, inst.Arg(1));
|
||||||
break;
|
break;
|
||||||
case IR::Opcode::SetLoopSafetyVariable:
|
|
||||||
pass.WriteVariable(LoopSafetyVariable{inst.Arg(0).U32()}, block, inst.Arg(1));
|
|
||||||
break;
|
|
||||||
case IR::Opcode::SetIndirectBranchVariable:
|
case IR::Opcode::SetIndirectBranchVariable:
|
||||||
pass.WriteVariable(IndirectBranchVariable{}, block, inst.Arg(0));
|
pass.WriteVariable(IndirectBranchVariable{}, block, inst.Arg(0));
|
||||||
break;
|
break;
|
||||||
|
@ -368,9 +343,6 @@ void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
|
||||||
case IR::Opcode::GetGotoVariable:
|
case IR::Opcode::GetGotoVariable:
|
||||||
inst.ReplaceUsesWith(pass.ReadVariable(GotoVariable{inst.Arg(0).U32()}, block));
|
inst.ReplaceUsesWith(pass.ReadVariable(GotoVariable{inst.Arg(0).U32()}, block));
|
||||||
break;
|
break;
|
||||||
case IR::Opcode::GetLoopSafetyVariable:
|
|
||||||
inst.ReplaceUsesWith(pass.ReadVariable(LoopSafetyVariable{inst.Arg(0).U32()}, block));
|
|
||||||
break;
|
|
||||||
case IR::Opcode::GetIndirectBranchVariable:
|
case IR::Opcode::GetIndirectBranchVariable:
|
||||||
inst.ReplaceUsesWith(pass.ReadVariable(IndirectBranchVariable{}, block));
|
inst.ReplaceUsesWith(pass.ReadVariable(IndirectBranchVariable{}, block));
|
||||||
break;
|
break;
|
||||||
|
|
Reference in New Issue