Merge pull request #3535 from ReinUsesLisp/gcc-warnings
video_core: Silence misc warnings
This commit is contained in:
commit
9418b983bd
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@ -828,7 +828,7 @@ inline MicroProfileLogEntry MicroProfileMakeLogIndex(uint64_t nBegin, MicroProfi
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MicroProfileLogEntry Entry = (nBegin<<62) | ((0x3fff&nToken)<<48) | (MP_LOG_TICK_MASK&nTick);
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int t = MicroProfileLogType(Entry);
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uint64_t nTimerIndex = MicroProfileLogTimerIndex(Entry);
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MP_ASSERT(t == nBegin);
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MP_ASSERT((uint64_t)t == nBegin);
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MP_ASSERT(nTimerIndex == (nToken&0x3fff));
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return Entry;
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@ -1556,10 +1556,10 @@ void MicroProfileFlip()
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pFramePut->nFrameStartCpu = MP_TICK();
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pFramePut->nFrameStartGpu = (uint32_t)MicroProfileGpuInsertTimeStamp();
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if(pFrameNext->nFrameStartGpu != (uint64_t)-1)
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if(pFrameNext->nFrameStartGpu != -1)
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pFrameNext->nFrameStartGpu = MicroProfileGpuGetTimeStamp((uint32_t)pFrameNext->nFrameStartGpu);
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if(pFrameCurrent->nFrameStartGpu == (uint64_t)-1)
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if(pFrameCurrent->nFrameStartGpu == -1)
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pFrameCurrent->nFrameStartGpu = pFrameNext->nFrameStartGpu + 1;
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uint64_t nFrameStartCpu = pFrameCurrent->nFrameStartCpu;
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@ -119,14 +119,6 @@ Texture::TICEntry KeplerCompute::GetTICEntry(u32 tic_index) const {
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Texture::TICEntry tic_entry;
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memory_manager.ReadBlockUnsafe(tic_address_gpu, &tic_entry, sizeof(Texture::TICEntry));
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const auto r_type{tic_entry.r_type.Value()};
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const auto g_type{tic_entry.g_type.Value()};
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const auto b_type{tic_entry.b_type.Value()};
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const auto a_type{tic_entry.a_type.Value()};
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// TODO(Subv): Different data types for separate components are not supported
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DEBUG_ASSERT(r_type == g_type && r_type == b_type && r_type == a_type);
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return tic_entry;
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}
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@ -93,10 +93,6 @@ void oglEnable(GLenum cap, bool state) {
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(state ? glEnable : glDisable)(cap);
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}
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void oglEnablei(GLenum cap, bool state, GLuint index) {
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(state ? glEnablei : glDisablei)(cap, index);
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}
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} // Anonymous namespace
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RasterizerOpenGL::RasterizerOpenGL(Core::System& system, Core::Frontend::EmuWindow& emu_window,
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@ -478,7 +474,6 @@ void RasterizerOpenGL::Clear() {
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void RasterizerOpenGL::Draw(bool is_indexed, bool is_instanced) {
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MICROPROFILE_SCOPE(OpenGL_Drawing);
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auto& gpu = system.GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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query_cache.UpdateCounters();
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@ -529,7 +524,7 @@ void RasterizerOpenGL::Draw(bool is_indexed, bool is_instanced) {
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// Upload vertex and index data.
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SetupVertexBuffer();
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SetupVertexInstances();
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GLintptr index_buffer_offset;
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GLintptr index_buffer_offset = 0;
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if (is_indexed) {
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index_buffer_offset = SetupIndexBuffer();
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}
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@ -555,7 +550,7 @@ void RasterizerOpenGL::Draw(bool is_indexed, bool is_instanced) {
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ConfigureFramebuffers();
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// Signal the buffer cache that we are not going to upload more things.
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const bool invalidate = buffer_cache.Unmap();
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buffer_cache.Unmap();
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// Now that we are no longer uploading data, we can safely bind the buffers to OpenGL.
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vertex_array_pushbuffer.Bind();
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@ -393,10 +393,6 @@ std::string FlowStackTopName(MetaStackClass stack) {
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return fmt::format("{}_flow_stack_top", GetFlowStackPrefix(stack));
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}
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[[deprecated]] constexpr bool IsVertexShader(ShaderType stage) {
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return stage == ShaderType::Vertex;
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}
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struct GenericVaryingDescription {
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std::string name;
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u8 first_element = 0;
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@ -529,8 +525,9 @@ private:
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}
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void DeclareVertex() {
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if (!IsVertexShader(stage))
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if (stage != ShaderType::Vertex) {
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return;
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}
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DeclareVertexRedeclarations();
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}
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@ -602,14 +599,14 @@ private:
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break;
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}
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}
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if (!IsVertexShader(stage) || device.HasVertexViewportLayer()) {
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if (stage != ShaderType::Vertex || device.HasVertexViewportLayer()) {
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if (ir.UsesLayer()) {
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code.AddLine("int gl_Layer;");
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}
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if (ir.UsesViewportIndex()) {
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code.AddLine("int gl_ViewportIndex;");
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}
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} else if ((ir.UsesLayer() || ir.UsesViewportIndex()) && IsVertexShader(stage) &&
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} else if ((ir.UsesLayer() || ir.UsesViewportIndex()) && stage == ShaderType::Vertex &&
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!device.HasVertexViewportLayer()) {
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LOG_ERROR(
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Render_OpenGL,
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@ -1147,7 +1144,7 @@ private:
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// TODO(Subv): Find out what the values are for the first two elements when inside a
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// vertex shader, and what's the value of the fourth element when inside a Tess Eval
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// shader.
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ASSERT(IsVertexShader(stage));
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ASSERT(stage == ShaderType::Vertex);
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switch (element) {
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case 2:
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// Config pack's first value is instance_id.
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@ -1218,12 +1215,12 @@ private:
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UNIMPLEMENTED();
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return {};
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case 1:
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if (IsVertexShader(stage) && !device.HasVertexViewportLayer()) {
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if (stage == ShaderType::Vertex && !device.HasVertexViewportLayer()) {
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return {};
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}
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return {{"gl_Layer", Type::Int}};
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case 2:
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if (IsVertexShader(stage) && !device.HasVertexViewportLayer()) {
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if (stage == ShaderType::Vertex && !device.HasVertexViewportLayer()) {
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return {};
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}
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return {{"gl_ViewportIndex", Type::Int}};
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@ -2532,7 +2529,7 @@ private:
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}
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u32 GetNumPhysicalInputAttributes() const {
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return IsVertexShader(stage) ? GetNumPhysicalAttributes() : GetNumPhysicalVaryings();
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return stage == ShaderType::Vertex ? GetNumPhysicalAttributes() : GetNumPhysicalVaryings();
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}
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u32 GetNumPhysicalAttributes() const {
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@ -257,6 +257,8 @@ vk::ShaderStageFlagBits ShaderStage(Tegra::Engines::ShaderType stage) {
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return vk::ShaderStageFlagBits::eGeometry;
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case Tegra::Engines::ShaderType::Fragment:
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return vk::ShaderStageFlagBits::eFragment;
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case Tegra::Engines::ShaderType::Compute:
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return vk::ShaderStageFlagBits::eCompute;
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}
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UNIMPLEMENTED_MSG("Unimplemented shader stage={}", static_cast<u32>(stage));
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return {};
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@ -192,7 +192,6 @@ std::array<Shader, Maxwell::MaxShaderProgram> VKPipelineCache::GetShaders() {
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std::array<Shader, Maxwell::MaxShaderProgram> shaders;
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for (std::size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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const auto& shader_config = gpu.regs.shader_config[index];
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const auto program{static_cast<Maxwell::ShaderProgram>(index)};
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// Skip stages that are not enabled
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@ -548,8 +548,6 @@ bool RasterizerVulkan::AccelerateDisplay(const Tegra::FramebufferConfig& config,
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// Verify that the cached surface is the same size and format as the requested framebuffer
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const auto& params{surface->GetSurfaceParams()};
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const auto& pixel_format{
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VideoCore::Surface::PixelFormatFromGPUPixelFormat(config.pixel_format)};
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ASSERT_MSG(params.width == config.width, "Framebuffer width is different");
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ASSERT_MSG(params.height == config.height, "Framebuffer height is different");
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@ -100,7 +100,6 @@ void VKStagingBufferPool::ReleaseCache(bool host_visible) {
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}
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u64 VKStagingBufferPool::ReleaseLevel(StagingBuffersCache& cache, std::size_t log2) {
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static constexpr u64 epochs_to_destroy = 180;
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static constexpr std::size_t deletions_per_tick = 16;
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auto& staging = cache[log2];
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@ -108,6 +107,7 @@ u64 VKStagingBufferPool::ReleaseLevel(StagingBuffersCache& cache, std::size_t lo
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const std::size_t old_size = entries.size();
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const auto is_deleteable = [this](const auto& entry) {
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static constexpr u64 epochs_to_destroy = 180;
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return entry.last_epoch + epochs_to_destroy < epoch && !entry.watch.IsUsed();
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};
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const std::size_t begin_offset = staging.delete_index;
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@ -52,6 +52,9 @@ vk::ImageType SurfaceTargetToImage(SurfaceTarget target) {
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return vk::ImageType::e2D;
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case SurfaceTarget::Texture3D:
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return vk::ImageType::e3D;
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case SurfaceTarget::TextureBuffer:
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UNREACHABLE();
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return {};
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}
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UNREACHABLE_MSG("Unknown texture target={}", static_cast<u32>(target));
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return {};
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@ -273,7 +276,6 @@ void CachedSurface::UploadImage(const std::vector<u8>& staging_buffer) {
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for (u32 level = 0; level < params.num_levels; ++level) {
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vk::BufferImageCopy copy = GetBufferImageCopy(level);
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const auto& dld = device.GetDispatchLoader();
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if (image->GetAspectMask() ==
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(vk::ImageAspectFlagBits::eDepth | vk::ImageAspectFlagBits::eStencil)) {
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vk::BufferImageCopy depth = copy;
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@ -422,7 +424,6 @@ void VKTextureCache::ImageCopy(Surface& src_surface, Surface& dst_surface,
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dst_base_layer, num_layers, copy_params.dest_level, 1, vk::PipelineStageFlagBits::eTransfer,
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vk::AccessFlagBits::eTransferWrite, vk::ImageLayout::eTransferDstOptimal);
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const auto& dld{device.GetDispatchLoader()};
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const vk::ImageSubresourceLayers src_subresource(
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src_surface->GetAspectMask(), copy_params.source_level, copy_params.source_z, num_layers);
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const vk::ImageSubresourceLayers dst_subresource(
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@ -458,7 +459,6 @@ void VKTextureCache::ImageBlit(View& src_view, View& dst_view,
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dst_view->GetImageSubresourceLayers(), {dst_top_left, dst_bot_right});
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const bool is_linear = copy_config.filter == Tegra::Engines::Fermi2D::Filter::Linear;
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const auto& dld{device.GetDispatchLoader()};
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scheduler.Record([src_image = src_view->GetImage(), dst_image = dst_view->GetImage(), blit,
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is_linear](auto cmdbuf, auto& dld) {
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cmdbuf.blitImage(src_image, vk::ImageLayout::eTransferSrcOptimal, dst_image,
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