shader_decode: SULD.D avoid duplicate code block.
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7f5696513f
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9efa51311f
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@ -272,7 +272,7 @@ std::size_t GetImageTypeNumCoordinates(Tegra::Shader::ImageType image_type) {
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} // Anonymous namespace
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Node ShaderIR::GetComponentValue(ComponentType component_type, u32 component_size,
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const Node original_value, bool* is_signed) {
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Node original_value, bool* is_signed) {
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switch (component_type) {
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case ComponentType::SNORM: {
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*is_signed = true;
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@ -366,38 +366,7 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) {
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const auto comp_mask = GetImageComponentMask(descriptor.format);
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switch (instr.suldst.GetStoreDataLayout()) {
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case StoreType::Bits32: {
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u32 shifted_counter = 0;
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Node value = Immediate(0);
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for (u32 element = 0; element < 4; ++element) {
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if (!IsComponentEnabled(comp_mask, element)) {
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continue;
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}
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const auto component_type = GetComponentType(descriptor, element);
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const auto component_size = GetComponentSize(descriptor.format, element);
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bool is_signed = true;
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MetaImage meta{image, {}, element};
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Node converted_value = GetComponentValue(
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component_type, component_size,
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Operation(OperationCode::ImageLoad, meta, GetCoordinates(type)),
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&is_signed);
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// shift element to correct position
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const auto shifted = shifted_counter;
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if (shifted > 0) {
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converted_value =
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SignedOperation(OperationCode::ILogicalShiftLeft, is_signed,
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std::move(converted_value), Immediate(shifted));
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}
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shifted_counter += component_size;
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// add value into result
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value = Operation(OperationCode::UBitwiseOr, value, std::move(converted_value));
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}
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SetRegister(bb, instr.gpr0.Value(), std::move(value));
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break;
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}
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case StoreType::Bits32:
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case StoreType::Bits64: {
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u32 indexer = 0;
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u32 shifted_counter = 0;
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@ -432,12 +401,6 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) {
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// if we shifted enough for 1 byte -> we save it into temp
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if (shifted_counter >= 32) {
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SetTemporary(bb, indexer++, std::move(value));
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// we only use 2 bytes for bits64
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if (indexer >= 2) {
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break;
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}
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// reset counter and value to prepare pack next byte
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value = Immediate(0);
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shifted_counter = 0;
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