Implemented Control Codes
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@ -240,6 +240,41 @@ enum class FlowCondition : u64 {
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Fcsm_Tr = 0x1C, // TODO(bunnei): What is this used for?
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};
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enum class ControlCode : u64 {
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F = 0,
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LT = 1,
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EQ = 2,
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LE = 3,
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GT = 4,
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NE = 5,
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GE = 6,
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Num = 7,
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Nan = 8,
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LTU = 9,
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EQU = 10,
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LEU = 11,
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GTU = 12,
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NEU = 13,
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GEU = 14,
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//
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OFF = 16,
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LO = 17,
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SFF = 18,
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LS = 19,
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HI = 20,
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SFT = 21,
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HS = 22,
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OFT = 23,
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CSM_TA = 24,
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CSM_TR = 25,
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CSM_MX = 26,
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FCSM_TA = 27,
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FCSM_TR = 28,
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FCSM_MX = 29,
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RLE = 30,
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RGT = 31,
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};
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enum class PredicateResultMode : u64 {
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None = 0x0,
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NotZero = 0x3,
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@ -735,6 +770,7 @@ union Instruction {
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BitField<36, 5, u64> index;
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} cbuf36;
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BitField<47, 1, u64> generates_cc;
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BitField<61, 1, u64> is_b_imm;
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BitField<60, 1, u64> is_b_gpr;
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BitField<59, 1, u64> is_c_gpr;
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@ -351,6 +351,15 @@ public:
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shader.AddLine(dest + " = " + src + ';');
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}
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std::string GetControlCode(const Tegra::Shader::ControlCode cc) {
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u32 code = static_cast<u32>(cc);
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return "controlCode_" + std::to_string(code);
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}
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void SetControlCode(const Tegra::Shader::ControlCode cc, const std::string& value) {
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shader.AddLine(GetControlCode(cc) + " = " + value + ';');
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}
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/**
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* Writes code that does a output attribute assignment to register operation. Output attributes
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* are stored as floats, so this may require conversion.
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@ -414,6 +423,12 @@ public:
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}
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declarations.AddNewLine();
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for (u32 cc = 0; cc < 32; cc++) {
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Tegra::Shader::ControlCode code = static_cast<Tegra::Shader::ControlCode>(cc);
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declarations.AddLine("bool " + GetControlCode(code) + " = false;");
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}
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declarations.AddNewLine();
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for (const auto element : declr_input_attribute) {
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// TODO(bunnei): Use proper number of elements for these
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u32 idx =
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