glsl: Update phi node management
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67f881e714
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b95716e543
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@ -98,18 +98,33 @@ void EmitInst(EmitContext& ctx, IR::Inst* inst) {
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throw LogicError("Invalid opcode {}", inst->GetOpcode());
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}
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void Precolor(EmitContext& ctx, const IR::Program& program) {
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bool IsReference(IR::Inst& inst) {
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return inst.GetOpcode() == IR::Opcode::Reference;
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}
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void PrecolorInst(IR::Inst& phi) {
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// Insert phi moves before references to avoid overwritting other phis
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const size_t num_args{phi.NumArgs()};
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for (size_t i = 0; i < num_args; ++i) {
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IR::Block& phi_block{*phi.PhiBlock(i)};
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auto it{std::find_if_not(phi_block.rbegin(), phi_block.rend(), IsReference).base()};
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IR::IREmitter ir{phi_block, it};
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const IR::Value arg{phi.Arg(i)};
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if (arg.IsImmediate()) {
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ir.PhiMove(phi, arg);
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} else {
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ir.PhiMove(phi, IR::Value{&RegAlloc::AliasInst(*arg.Inst())});
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}
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}
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for (size_t i = 0; i < num_args; ++i) {
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IR::IREmitter{*phi.PhiBlock(i)}.Reference(IR::Value{&phi});
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}
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}
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void Precolor(const IR::Program& program) {
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for (IR::Block* const block : program.blocks) {
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for (IR::Inst& phi : block->Instructions() | std::views::take_while(IR::IsPhi)) {
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ctx.Add("{};", ctx.reg_alloc.Define(phi, phi.Arg(0).Type()));
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const size_t num_args{phi.NumArgs()};
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for (size_t i = 0; i < num_args; ++i) {
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IR::IREmitter{*phi.PhiBlock(i)}.PhiMove(phi, phi.Arg(i));
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}
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// Add reference to the phi node on the phi predecessor to avoid overwritting it
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for (size_t i = 0; i < num_args; ++i) {
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IR::IREmitter{*phi.PhiBlock(i)}.Reference(IR::Value{&phi});
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}
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PrecolorInst(phi);
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}
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}
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}
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@ -158,7 +173,7 @@ void EmitCode(EmitContext& ctx, const IR::Program& program) {
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std::string EmitGLSL(const Profile& profile, const RuntimeInfo&, IR::Program& program,
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Bindings& bindings) {
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EmitContext ctx{program, bindings, profile};
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Precolor(ctx, program);
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Precolor(program);
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EmitCode(ctx, program);
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return ctx.code;
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}
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@ -19,8 +19,15 @@ static void NotImplemented() {
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throw NotImplementedException("GLSL instruction");
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}
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void EmitPhi(EmitContext& ctx, IR::Inst& inst) {
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// NotImplemented();
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void EmitPhi(EmitContext& ctx, IR::Inst& phi) {
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const size_t num_args{phi.NumArgs()};
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for (size_t i = 0; i < num_args; ++i) {
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ctx.reg_alloc.Consume(phi.Arg(i));
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}
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if (!phi.Definition<Id>().is_valid) {
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// The phi node wasn't forward defined
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ctx.Add("{};", ctx.reg_alloc.Define(phi, phi.Arg(0).Type()));
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}
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}
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void EmitVoid(EmitContext& ctx) {
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@ -31,11 +38,18 @@ void EmitReference(EmitContext&) {
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// NotImplemented();
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}
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void EmitPhiMove(EmitContext& ctx, const IR::Value& phi, const IR::Value& value) {
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if (phi == value) {
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void EmitPhiMove(EmitContext& ctx, const IR::Value& phi_value, const IR::Value& value) {
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IR::Inst& phi{RegAlloc::AliasInst(*phi_value.Inst())};
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if (!phi.Definition<Id>().is_valid) {
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// The phi node wasn't forward defined
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ctx.Add("{};", ctx.reg_alloc.Define(phi, phi.Arg(0).Type()));
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}
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const auto phi_reg{ctx.reg_alloc.Consume(IR::Value{&phi})};
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const auto val_reg{ctx.reg_alloc.Consume(value)};
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if (phi_reg == val_reg) {
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return;
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}
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ctx.Add("{}={};", ctx.reg_alloc.Consume(phi), ctx.reg_alloc.Consume(value));
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ctx.Add("{}={};", phi_reg, val_reg);
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}
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void EmitBranch(EmitContext& ctx, std::string_view label) {
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@ -146,10 +146,11 @@ Id RegAlloc::Alloc() {
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}
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register_use[reg] = true;
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Id ret{};
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ret.index.Assign(static_cast<u32>(reg));
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ret.is_valid.Assign(1);
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ret.is_long.Assign(0);
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ret.is_spill.Assign(0);
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ret.is_condition_code.Assign(0);
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ret.index.Assign(static_cast<u32>(reg));
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return ret;
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}
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}
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@ -33,10 +33,12 @@ enum class Type : u32 {
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struct Id {
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union {
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u32 raw;
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BitField<0, 29, u32> index;
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BitField<29, 1, u32> is_long;
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BitField<30, 1, u32> is_spill;
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BitField<31, 1, u32> is_condition_code;
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BitField<0, 1, u32> is_valid;
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BitField<1, 1, u32> is_long;
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BitField<2, 1, u32> is_spill;
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BitField<3, 1, u32> is_condition_code;
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BitField<4, 1, u32> is_null;
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BitField<5, 27, u32> index;
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};
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bool operator==(Id rhs) const noexcept {
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