Merge pull request #494 from bunnei/shader-tex
gl_shader_decompiler: Implement TEX, fixes for TEXS.
This commit is contained in:
commit
bb9d39b8fe
|
@ -261,6 +261,19 @@ union Instruction {
|
|||
BitField<50, 1, u64> saturate_a;
|
||||
} conversion;
|
||||
|
||||
union {
|
||||
BitField<31, 4, u64> component_mask;
|
||||
|
||||
bool IsComponentEnabled(size_t component) const {
|
||||
return ((1 << component) & component_mask) != 0;
|
||||
}
|
||||
} tex;
|
||||
|
||||
union {
|
||||
// TODO(bunnei): This is just a guess, needs to be verified
|
||||
BitField<52, 1, u64> enable_g_component;
|
||||
} texs;
|
||||
|
||||
BitField<61, 1, u64> is_b_imm;
|
||||
BitField<60, 1, u64> is_b_gpr;
|
||||
BitField<59, 1, u64> is_c_gpr;
|
||||
|
@ -281,6 +294,7 @@ public:
|
|||
KIL,
|
||||
LD_A,
|
||||
ST_A,
|
||||
TEX,
|
||||
TEXQ, // Texture Query
|
||||
TEXS, // Texture Fetch with scalar/non-vec4 source/destinations
|
||||
TLDS, // Texture Load with scalar/non-vec4 source/destinations
|
||||
|
@ -444,6 +458,7 @@ private:
|
|||
INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
|
||||
INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
|
||||
INST("1110111111110---", Id::ST_A, Type::Memory, "ST_A"),
|
||||
INST("1100000000111---", Id::TEX, Type::Memory, "TEX"),
|
||||
INST("1101111101001---", Id::TEXQ, Type::Memory, "TEXQ"),
|
||||
INST("1101100---------", Id::TEXS, Type::Memory, "TEXS"),
|
||||
INST("1101101---------", Id::TLDS, Type::Memory, "TLDS"),
|
||||
|
|
|
@ -896,6 +896,32 @@ private:
|
|||
instr.gpr0);
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::TEX: {
|
||||
ASSERT_MSG(instr.attribute.fmt20.size == 4, "untested");
|
||||
const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
|
||||
const std::string op_b = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
|
||||
const std::string sampler = GetSampler(instr.sampler);
|
||||
const std::string coord = "vec2 coords = vec2(" + op_a + ", " + op_b + ");";
|
||||
// Add an extra scope and declare the texture coords inside to prevent overwriting
|
||||
// them in case they are used as outputs of the texs instruction.
|
||||
shader.AddLine("{");
|
||||
++shader.scope;
|
||||
shader.AddLine(coord);
|
||||
const std::string texture = "texture(" + sampler + ", coords)";
|
||||
|
||||
size_t dest_elem{};
|
||||
for (size_t elem = 0; elem < instr.attribute.fmt20.size; ++elem) {
|
||||
if (!instr.tex.IsComponentEnabled(elem)) {
|
||||
// Skip disabled components
|
||||
continue;
|
||||
}
|
||||
regs.SetRegisterToFloat(instr.gpr0, elem, texture, 1, 4, false, dest_elem);
|
||||
++dest_elem;
|
||||
}
|
||||
--shader.scope;
|
||||
shader.AddLine("}");
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::TEXS: {
|
||||
ASSERT_MSG(instr.attribute.fmt20.size == 4, "untested");
|
||||
const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
|
||||
|
@ -908,8 +934,23 @@ private:
|
|||
++shader.scope;
|
||||
shader.AddLine(coord);
|
||||
const std::string texture = "texture(" + sampler + ", coords)";
|
||||
for (unsigned elem = 0; elem < instr.attribute.fmt20.size; ++elem) {
|
||||
regs.SetRegisterToFloat(instr.gpr0, elem, texture, 1, 4, false, elem);
|
||||
|
||||
// TEXS has two destination registers. RG goes into gpr0+0 and gpr0+1, and BA goes
|
||||
// into gpr28+0 and gpr28+1
|
||||
size_t offset{};
|
||||
for (const auto& dest : {instr.gpr0.Value(), instr.gpr28.Value()}) {
|
||||
for (unsigned elem = 0; elem < 2; ++elem) {
|
||||
if (dest + elem >= Register::ZeroIndex) {
|
||||
// Skip invalid register values
|
||||
break;
|
||||
}
|
||||
regs.SetRegisterToFloat(dest, elem + offset, texture, 1, 4, false, elem);
|
||||
if (!instr.texs.enable_g_component) {
|
||||
// Skip the second component
|
||||
break;
|
||||
}
|
||||
}
|
||||
offset += 2;
|
||||
}
|
||||
--shader.scope;
|
||||
shader.AddLine("}");
|
||||
|
|
Reference in New Issue