shader: Implement TLD4 and TLD4_B
This commit is contained in:
parent
32c5483beb
commit
c7c518e280
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@ -124,6 +124,7 @@ add_library(shader_recompiler STATIC
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frontend/maxwell/translate/impl/select_source_with_predicate.cpp
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frontend/maxwell/translate/impl/texture_fetch.cpp
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frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
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frontend/maxwell/translate/impl/texture_gather.cpp
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frontend/maxwell/translate/impl/vote.cpp
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frontend/maxwell/translate/impl/warp_shuffle.cpp
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frontend/maxwell/translate/translate.cpp
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@ -340,10 +340,14 @@ Id EmitBindlessImageSampleImplicitLod(EmitContext&);
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Id EmitBindlessImageSampleExplicitLod(EmitContext&);
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Id EmitBindlessImageSampleDrefImplicitLod(EmitContext&);
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Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&);
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Id EmitBindlessImageGather(EmitContext&);
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Id EmitBindlessImageGatherDref(EmitContext&);
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Id EmitBoundImageSampleImplicitLod(EmitContext&);
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Id EmitBoundImageSampleExplicitLod(EmitContext&);
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Id EmitBoundImageSampleDrefImplicitLod(EmitContext&);
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Id EmitBoundImageSampleDrefExplicitLod(EmitContext&);
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Id EmitBoundImageGather(EmitContext&);
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Id EmitBoundImageGatherDref(EmitContext&);
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id bias_lc, Id offset);
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Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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@ -352,6 +356,10 @@ Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va
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Id coords, Id dref, Id bias_lc, Id offset);
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Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
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Id coords, Id dref, Id lod_lc, Id offset);
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Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
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Id offset2);
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Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id offset, Id offset2, Id dref);
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Id EmitVoteAll(EmitContext& ctx, Id pred);
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Id EmitVoteAny(EmitContext& ctx, Id pred);
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Id EmitVoteEqual(EmitContext& ctx, Id pred);
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@ -30,6 +30,12 @@ public:
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}
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}
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explicit ImageOperands([[maybe_unused]] EmitContext& ctx, Id offset) {
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if (Sirit::ValidId(offset)) {
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Add(spv::ImageOperandsMask::Offset, offset);
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}
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}
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void Add(spv::ImageOperandsMask new_mask, Id value) {
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mask = static_cast<spv::ImageOperandsMask>(static_cast<unsigned>(mask) |
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static_cast<unsigned>(new_mask));
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@ -98,6 +104,14 @@ Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitBindlessImageGather(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitBindlessImageGatherDref(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitBoundImageSampleImplicitLod(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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@ -114,6 +128,14 @@ Id EmitBoundImageSampleDrefExplicitLod(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitBoundImageGather(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitBoundImageGatherDref(EmitContext&) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id bias_lc, Id offset) {
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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@ -152,4 +174,22 @@ Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va
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Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
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}
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Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
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[[maybe_unused]] Id offset2) {
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const ImageOperands operands(ctx, offset);
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return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst,
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ctx.F32[4], Texture(ctx, index), coords,
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ctx.Constant(ctx.U32[1], info.gather_component.Value()), operands.Mask(),
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operands.Span());
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}
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Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id offset, [[maybe_unused]] Id offset2, Id dref) {
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const auto info{inst->Flags<IR::TextureInstInfo>()};
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const ImageOperands operands(ctx, offset);
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return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst,
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ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
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}
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} // namespace Shader::Backend::SPIRV
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@ -1474,6 +1474,19 @@ F32 IREmitter::ImageSampleDrefExplicitLod(const Value& handle, const Value& coor
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return Inst<F32>(op, Flags{info}, handle, coords, dref, lod_lc, offset);
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}
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Value IREmitter::ImageGather(const Value& handle, const Value& coords, const Value& offset,
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const Value& offset2, TextureInstInfo info) {
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const Opcode op{handle.IsImmediate() ? Opcode::BoundImageGather : Opcode::BindlessImageGather};
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return Inst(op, Flags{info}, handle, coords, offset, offset2);
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}
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Value IREmitter::ImageGatherDref(const Value& handle, const Value& coords, const Value& offset,
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const Value& offset2, const F32& dref, TextureInstInfo info) {
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const Opcode op{handle.IsImmediate() ? Opcode::BoundImageGatherDref
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: Opcode::BindlessImageGatherDref};
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return Inst(op, Flags{info}, handle, coords, offset, offset2, dref);
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}
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U1 IREmitter::VoteAll(const U1& value) {
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return Inst<U1>(Opcode::VoteAll, value);
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}
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@ -240,6 +240,12 @@ public:
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const Value& offset, const F32& lod_clamp,
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TextureInstInfo info);
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[[nodiscard]] Value ImageGather(const Value& handle, const Value& coords, const Value& offset,
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const Value& offset2, TextureInstInfo info);
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[[nodiscard]] Value ImageGatherDref(const Value& handle, const Value& coords, const Value& offset,
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const Value& offset2, const F32& dref, TextureInstInfo info);
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[[nodiscard]] U1 VoteAll(const U1& value);
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[[nodiscard]] U1 VoteAny(const U1& value);
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[[nodiscard]] U1 VoteEqual(const U1& value);
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@ -38,6 +38,7 @@ union TextureInstInfo {
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BitField<8, 1, u32> has_bias;
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BitField<9, 1, u32> has_lod_clamp;
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BitField<10, 1, u32> relaxed_precision;
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BitField<11, 2, u32> gather_component;
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};
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static_assert(sizeof(TextureInstInfo) <= sizeof(u32));
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@ -353,16 +353,22 @@ OPCODE(BindlessImageSampleImplicitLod, F32x4, U32,
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OPCODE(BindlessImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(BindlessImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(BindlessImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(BindlessImageGather, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(BindlessImageGatherDref, F32x4, U32, Opaque, Opaque, Opaque, F32, )
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OPCODE(BoundImageSampleImplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(BoundImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(BoundImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(BoundImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(BoundImageGather, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(BoundImageGatherDref, F32x4, U32, Opaque, Opaque, Opaque, F32, )
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OPCODE(ImageSampleImplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(ImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(ImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(ImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(ImageGather, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(ImageGatherDref, F32x4, U32, Opaque, Opaque, Opaque, F32, )
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// Warp operations
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OPCODE(VoteAll, U1, U1, )
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@ -254,8 +254,8 @@ INST(TEX_b, "TEX (b)", "1101 1110 10-- ----")
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INST(TEXS, "TEXS", "1101 -00- ---- ----")
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INST(TLD, "TLD", "1101 1100 --11 1---")
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INST(TLD_b, "TLD (b)", "1101 1101 --11 1---")
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INST(TLD4, "TLD4", "1100 10-- --11 1---")
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INST(TLD4_b, "TLD4 (b)", "1101 1110 1111 1---")
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INST(TLD4, "TLD4", "1100 10-- ---- ----")
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INST(TLD4_b, "TLD4 (b)", "1101 1110 11-- ----")
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INST(TLD4S, "TLD4S", "1101 1111 -0-- ----")
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INST(TLDS, "TLDS", "1101 -01- ---- ----")
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INST(TMML, "TMML", "1101 1111 0101 1---")
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@ -349,14 +349,6 @@ void TranslatorVisitor::TLD_b(u64) {
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ThrowNotImplemented(Opcode::TLD_b);
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}
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void TranslatorVisitor::TLD4(u64) {
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ThrowNotImplemented(Opcode::TLD4);
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}
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void TranslatorVisitor::TLD4_b(u64) {
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ThrowNotImplemented(Opcode::TLD4_b);
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}
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void TranslatorVisitor::TLD4S(u64) {
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ThrowNotImplemented(Opcode::TLD4S);
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}
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@ -0,0 +1,209 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <optional>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/ir/modifiers.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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enum class TextureType : u64 {
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_1D,
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ARRAY_1D,
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_2D,
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ARRAY_2D,
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_3D,
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ARRAY_3D,
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CUBE,
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ARRAY_CUBE,
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};
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enum class OffsetType : u64 {
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None = 0,
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AOFFI,
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PTP,
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Invalid,
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};
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enum class ComponentType : u64 {
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R = 0,
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G = 1,
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B = 2,
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A = 3,
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};
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Shader::TextureType GetType(TextureType type, bool dc) {
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switch (type) {
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case TextureType::_1D:
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return dc ? Shader::TextureType::Shadow1D : Shader::TextureType::Color1D;
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case TextureType::ARRAY_1D:
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return dc ? Shader::TextureType::ShadowArray1D : Shader::TextureType::ColorArray1D;
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case TextureType::_2D:
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return dc ? Shader::TextureType::Shadow2D : Shader::TextureType::Color2D;
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case TextureType::ARRAY_2D:
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return dc ? Shader::TextureType::ShadowArray2D : Shader::TextureType::ColorArray2D;
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case TextureType::_3D:
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return dc ? Shader::TextureType::Shadow3D : Shader::TextureType::Color3D;
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case TextureType::ARRAY_3D:
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throw NotImplementedException("3D array texture type");
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case TextureType::CUBE:
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return dc ? Shader::TextureType::ShadowCube : Shader::TextureType::ColorCube;
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case TextureType::ARRAY_CUBE:
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return dc ? Shader::TextureType::ShadowArrayCube : Shader::TextureType::ColorArrayCube;
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}
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throw NotImplementedException("Invalid texture type {}", type);
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}
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IR::Value MakeCoords(TranslatorVisitor& v, IR::Reg reg, TextureType type) {
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const auto read_array{[&]() -> IR::F32 { return v.ir.ConvertUToF(32, 16, v.X(reg)); }};
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switch (type) {
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case TextureType::_1D:
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return v.F(reg);
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case TextureType::ARRAY_1D:
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return v.ir.CompositeConstruct(read_array(), v.F(reg + 1));
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case TextureType::_2D:
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return v.ir.CompositeConstruct(v.F(reg), v.F(reg + 1));
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case TextureType::ARRAY_2D:
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return v.ir.CompositeConstruct(read_array(), v.F(reg + 1), v.F(reg + 2));
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case TextureType::_3D:
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return v.ir.CompositeConstruct(v.F(reg), v.F(reg + 1), v.F(reg + 2));
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case TextureType::ARRAY_3D:
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throw NotImplementedException("3D array texture type");
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case TextureType::CUBE:
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return v.ir.CompositeConstruct(v.F(reg), v.F(reg + 1), v.F(reg + 2));
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case TextureType::ARRAY_CUBE:
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return v.ir.CompositeConstruct(read_array(), v.F(reg + 1), v.F(reg + 2), v.F(reg + 3));
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}
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throw NotImplementedException("Invalid texture type {}", type);
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}
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IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg& reg, TextureType type) {
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const IR::U32 value{v.X(reg++)};
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switch (type) {
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case TextureType::_1D:
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case TextureType::ARRAY_1D:
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return v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true);
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case TextureType::_2D:
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case TextureType::ARRAY_2D:
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return v.ir.CompositeConstruct(
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v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true));
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case TextureType::_3D:
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case TextureType::ARRAY_3D:
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return v.ir.CompositeConstruct(
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v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(16), v.ir.Imm32(6), true));
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case TextureType::CUBE:
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case TextureType::ARRAY_CUBE:
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throw NotImplementedException("Illegal offset on CUBE sample");
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}
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throw NotImplementedException("Invalid texture type {}", type);
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}
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std::pair<IR::Value, IR::Value> MakeOffsetPTP(TranslatorVisitor& v, IR::Reg& reg) {
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const IR::U32 value1{v.X(reg++)};
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const IR::U32 value2{v.X(reg++)};
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const auto getVector = ([&v](const IR::U32& value) {
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return v.ir.CompositeConstruct(
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v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(16), v.ir.Imm32(6), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(24), v.ir.Imm32(6), true));
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});
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return {getVector(value1), getVector(value2)};
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}
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void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetType offset_type,
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bool is_bindless) {
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union {
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u64 raw;
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BitField<35, 1, u64> ndv;
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BitField<49, 1, u64> nodep;
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BitField<50, 1, u64> dc;
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BitField<51, 3, IR::Pred> sparse_pred;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> coord_reg;
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BitField<20, 8, IR::Reg> meta_reg;
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BitField<28, 3, TextureType> type;
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BitField<31, 4, u64> mask;
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BitField<36, 13, u64> cbuf_offset;
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} const tld4{insn};
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const IR::Value coords{MakeCoords(v, tld4.coord_reg, tld4.type)};
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IR::Reg meta_reg{tld4.meta_reg};
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IR::Value handle;
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IR::Value offset;
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IR::Value offset2;
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IR::F32 dref;
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if (!is_bindless) {
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handle = v.ir.Imm32(static_cast<u32>(tld4.cbuf_offset.Value() * 4));
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} else {
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handle = v.X(meta_reg++);
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}
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switch (offset_type) {
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case OffsetType::None:
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break;
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case OffsetType::AOFFI: {
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offset = MakeOffset(v, meta_reg, tld4.type);
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break;
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}
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case OffsetType::PTP: {
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std::tie(offset, offset2) = MakeOffsetPTP(v, meta_reg);
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break;
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}
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default:
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throw NotImplementedException("Invalid offset type {}", offset_type);
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}
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if (tld4.dc != 0) {
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dref = v.F(meta_reg++);
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}
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IR::TextureInstInfo info{};
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info.type.Assign(GetType(tld4.type, tld4.dc != 0));
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info.gather_component.Assign(static_cast<u32>(component_type));
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const IR::Value sample{[&]() -> IR::Value {
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if (tld4.dc == 0) {
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return v.ir.ImageGather(handle, coords, offset, offset2, info);
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}
|
||||
return v.ir.ImageGatherDref(handle, coords, offset, offset2, dref, info);
|
||||
}()};
|
||||
|
||||
IR::Reg dest_reg{tld4.dest_reg};
|
||||
for (size_t element = 0; element < 4; ++element) {
|
||||
if (((tld4.mask >> element) & 1) == 0) {
|
||||
continue;
|
||||
}
|
||||
v.F(dest_reg, IR::F32{v.ir.CompositeExtract(sample, element)});
|
||||
++dest_reg;
|
||||
}
|
||||
if (tld4.sparse_pred != IR::Pred::PT) {
|
||||
v.ir.SetPred(tld4.sparse_pred, v.ir.LogicalNot(v.ir.GetSparseFromOp(sample)));
|
||||
}
|
||||
}
|
||||
} // Anonymous namespace
|
||||
|
||||
void TranslatorVisitor::TLD4(u64 insn) {
|
||||
union {
|
||||
u64 raw;
|
||||
BitField<56, 2, ComponentType> component;
|
||||
BitField<54, 2, OffsetType> offset;
|
||||
} const tld4{insn};
|
||||
Impl(*this, insn, tld4.component, tld4.offset, false);
|
||||
}
|
||||
|
||||
void TranslatorVisitor::TLD4_b(u64 insn) {
|
||||
union {
|
||||
u64 raw;
|
||||
BitField<38, 2, ComponentType> component;
|
||||
BitField<36, 2, OffsetType> offset;
|
||||
} const tld4{insn};
|
||||
Impl(*this, insn, tld4.component, tld4.offset, true);
|
||||
}
|
||||
|
||||
} // namespace Shader::Maxwell
|
|
@ -352,14 +352,20 @@ void VisitUsages(Info& info, IR::Inst& inst) {
|
|||
case IR::Opcode::BindlessImageSampleExplicitLod:
|
||||
case IR::Opcode::BindlessImageSampleDrefImplicitLod:
|
||||
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::BindlessImageGather:
|
||||
case IR::Opcode::BindlessImageGatherDref:
|
||||
case IR::Opcode::BoundImageSampleImplicitLod:
|
||||
case IR::Opcode::BoundImageSampleExplicitLod:
|
||||
case IR::Opcode::BoundImageSampleDrefImplicitLod:
|
||||
case IR::Opcode::BoundImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::BoundImageGather:
|
||||
case IR::Opcode::BoundImageGatherDref:
|
||||
case IR::Opcode::ImageSampleImplicitLod:
|
||||
case IR::Opcode::ImageSampleExplicitLod:
|
||||
case IR::Opcode::ImageSampleDrefImplicitLod:
|
||||
case IR::Opcode::ImageSampleDrefExplicitLod: {
|
||||
case IR::Opcode::ImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::ImageGather:
|
||||
case IR::Opcode::ImageGatherDref: {
|
||||
const TextureType type{inst.Flags<IR::TextureInstInfo>().type};
|
||||
info.uses_sampled_1d |= type == TextureType::Color1D || type == TextureType::ColorArray1D ||
|
||||
type == TextureType::Shadow1D || type == TextureType::ShadowArray1D;
|
||||
|
|
|
@ -403,6 +403,18 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
|||
return (base >> shift) & ((1U << count) - 1);
|
||||
});
|
||||
return;
|
||||
case IR::Opcode::BitFieldSExtract:
|
||||
FoldWhenAllImmediates(inst, [](s32 base, u32 shift, u32 count) {
|
||||
const size_t back_shift = static_cast<size_t>(shift) + static_cast<size_t>(count);
|
||||
if (back_shift > Common::BitSize<s32>()) {
|
||||
throw LogicError("Undefined result in {}({}, {}, {})", IR::Opcode::BitFieldSExtract,
|
||||
base, shift, count);
|
||||
}
|
||||
const size_t left_shift = Common::BitSize<s32>() - back_shift;
|
||||
return static_cast<u32>(static_cast<s32>(base << left_shift) >>
|
||||
static_cast<size_t>(Common::BitSize<s32>() - count));
|
||||
});
|
||||
return;
|
||||
case IR::Opcode::BranchConditional:
|
||||
return FoldBranchConditional(inst);
|
||||
default:
|
||||
|
|
|
@ -45,6 +45,12 @@ IR::Opcode IndexedInstruction(const IR::Inst& inst) {
|
|||
case IR::Opcode::BoundImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
|
||||
return IR::Opcode::ImageSampleDrefExplicitLod;
|
||||
case IR::Opcode::BindlessImageGather:
|
||||
case IR::Opcode::BoundImageGather:
|
||||
return IR::Opcode::ImageGather;
|
||||
case IR::Opcode::BindlessImageGatherDref:
|
||||
case IR::Opcode::BoundImageGatherDref:
|
||||
return IR::Opcode::ImageGatherDref;
|
||||
default:
|
||||
return IR::Opcode::Void;
|
||||
}
|
||||
|
@ -56,11 +62,15 @@ bool IsBindless(const IR::Inst& inst) {
|
|||
case IR::Opcode::BindlessImageSampleExplicitLod:
|
||||
case IR::Opcode::BindlessImageSampleDrefImplicitLod:
|
||||
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::BindlessImageGather:
|
||||
case IR::Opcode::BindlessImageGatherDref:
|
||||
return true;
|
||||
case IR::Opcode::BoundImageSampleImplicitLod:
|
||||
case IR::Opcode::BoundImageSampleExplicitLod:
|
||||
case IR::Opcode::BoundImageSampleDrefImplicitLod:
|
||||
case IR::Opcode::BoundImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::BoundImageGather:
|
||||
case IR::Opcode::BoundImageGatherDref:
|
||||
return false;
|
||||
default:
|
||||
throw InvalidArgument("Invalid opcode {}", inst.Opcode());
|
||||
|
|
Reference in New Issue