NVServices: Styling, define constructors as explicit and corrections
This commit is contained in:
parent
b391e5f638
commit
d20ede40b1
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@ -1,5 +1,9 @@
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// Copyright 2019 Yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hardware_interrupt_manager.h"
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#include "core/hardware_interrupt_manager.h"
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#include "core/hle/service/nvdrv/interface.h"
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#include "core/hle/service/nvdrv/interface.h"
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#include "core/hle/service/sm/sm.h"
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#include "core/hle/service/sm/sm.h"
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@ -11,11 +15,13 @@ InterruptManager::InterruptManager(Core::System& system_in) : system(system_in)
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system.CoreTiming().RegisterEvent("GPUInterrupt", [this](u64 message, s64) {
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system.CoreTiming().RegisterEvent("GPUInterrupt", [this](u64 message, s64) {
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auto nvdrv = system.ServiceManager().GetService<Service::Nvidia::NVDRV>("nvdrv");
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auto nvdrv = system.ServiceManager().GetService<Service::Nvidia::NVDRV>("nvdrv");
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const u32 syncpt = static_cast<u32>(message >> 32);
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const u32 syncpt = static_cast<u32>(message >> 32);
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const u32 value = static_cast<u32>(message & 0x00000000FFFFFFFFULL);
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const u32 value = static_cast<u32>(message);
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nvdrv->SignalGPUInterruptSyncpt(syncpt, value);
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nvdrv->SignalGPUInterruptSyncpt(syncpt, value);
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});
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});
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}
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}
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InterruptManager::~InterruptManager() = default;
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void InterruptManager::GPUInterruptSyncpt(const u32 syncpoint_id, const u32 value) {
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void InterruptManager::GPUInterruptSyncpt(const u32 syncpoint_id, const u32 value) {
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const u64 msg = (static_cast<u64>(syncpoint_id) << 32ULL) | value;
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const u64 msg = (static_cast<u64>(syncpoint_id) << 32ULL) | value;
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system.CoreTiming().ScheduleEvent(10, gpu_interrupt_event, msg);
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system.CoreTiming().ScheduleEvent(10, gpu_interrupt_event, msg);
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@ -1,20 +1,27 @@
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// Copyright 2019 Yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#pragma once
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/core_timing.h"
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namespace Core {
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namespace Core {
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class System;
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class System;
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}
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}
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namespace Core::Timing {
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struct EventType;
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}
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namespace Core::Hardware {
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namespace Core::Hardware {
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class InterruptManager {
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class InterruptManager {
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public:
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public:
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InterruptManager(Core::System& system);
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explicit InterruptManager(Core::System& system);
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~InterruptManager() = default;
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~InterruptManager();
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void GPUInterruptSyncpt(const u32 syncpoint_id, const u32 value);
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void GPUInterruptSyncpt(u32 syncpoint_id, u32 value);
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private:
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private:
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Core::System& system;
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Core::System& system;
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@ -20,7 +20,7 @@ namespace Service::Nvidia::Devices {
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/// implement the ioctl interface.
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/// implement the ioctl interface.
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class nvdevice {
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class nvdevice {
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public:
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public:
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nvdevice(Core::System& system) : system{system} {};
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explicit nvdevice(Core::System& system) : system{system} {};
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virtual ~nvdevice() = default;
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virtual ~nvdevice() = default;
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union Ioctl {
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union Ioctl {
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u32_le raw;
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u32_le raw;
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@ -15,7 +15,7 @@
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namespace Service::Nvidia::Devices {
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namespace Service::Nvidia::Devices {
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nvhost_ctrl::nvhost_ctrl(Core::System& system, EventsInterface& events_interface)
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nvhost_ctrl::nvhost_ctrl(Core::System& system, EventInterface& events_interface)
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: nvdevice(system), events_interface{events_interface} {}
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: nvdevice(system), events_interface{events_interface} {}
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nvhost_ctrl::~nvhost_ctrl() = default;
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nvhost_ctrl::~nvhost_ctrl() = default;
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@ -67,12 +67,11 @@ u32 nvhost_ctrl::IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>&
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if (!gpu.IsAsync()) {
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if (!gpu.IsAsync()) {
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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gpu.Guard(true);
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auto lock = gpu.LockSync();
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u32 current_syncpoint_value = gpu.GetSyncpointValue(params.syncpt_id);
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u32 current_syncpoint_value = gpu.GetSyncpointValue(params.syncpt_id);
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if (current_syncpoint_value >= params.threshold) {
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if (current_syncpoint_value >= params.threshold) {
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params.value = current_syncpoint_value;
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params.value = current_syncpoint_value;
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std::memcpy(output.data(), ¶ms, sizeof(params));
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std::memcpy(output.data(), ¶ms, sizeof(params));
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gpu.Guard(false);
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -82,7 +81,6 @@ u32 nvhost_ctrl::IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>&
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if (params.timeout == 0) {
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if (params.timeout == 0) {
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std::memcpy(output.data(), ¶ms, sizeof(params));
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std::memcpy(output.data(), ¶ms, sizeof(params));
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gpu.Guard(false);
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return NvResult::Timeout;
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return NvResult::Timeout;
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}
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}
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@ -91,7 +89,6 @@ u32 nvhost_ctrl::IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>&
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event_id = params.value & 0x00FF;
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event_id = params.value & 0x00FF;
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if (event_id >= 64) {
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if (event_id >= 64) {
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std::memcpy(output.data(), ¶ms, sizeof(params));
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std::memcpy(output.data(), ¶ms, sizeof(params));
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gpu.Guard(false);
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return NvResult::BadParameter;
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return NvResult::BadParameter;
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}
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}
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} else {
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} else {
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@ -119,15 +116,12 @@ u32 nvhost_ctrl::IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>&
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ctrl.must_delay = true;
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ctrl.must_delay = true;
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ctrl.timeout = params.timeout;
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ctrl.timeout = params.timeout;
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ctrl.event_id = event_id;
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ctrl.event_id = event_id;
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gpu.Guard(false);
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return NvResult::Timeout;
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return NvResult::Timeout;
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}
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}
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std::memcpy(output.data(), ¶ms, sizeof(params));
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std::memcpy(output.data(), ¶ms, sizeof(params));
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gpu.Guard(false);
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return NvResult::Timeout;
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return NvResult::Timeout;
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}
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}
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std::memcpy(output.data(), ¶ms, sizeof(params));
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std::memcpy(output.data(), ¶ms, sizeof(params));
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gpu.Guard(false);
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return NvResult::BadParameter;
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return NvResult::BadParameter;
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}
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}
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@ -14,7 +14,7 @@ namespace Service::Nvidia::Devices {
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class nvhost_ctrl final : public nvdevice {
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class nvhost_ctrl final : public nvdevice {
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public:
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public:
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nvhost_ctrl(Core::System& system, EventsInterface& events_interface);
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explicit nvhost_ctrl(Core::System& system, EventInterface& events_interface);
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~nvhost_ctrl() override;
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~nvhost_ctrl() override;
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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@ -143,7 +143,7 @@ private:
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u32 IocCtrlEventSignal(const std::vector<u8>& input, std::vector<u8>& output);
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u32 IocCtrlEventSignal(const std::vector<u8>& input, std::vector<u8>& output);
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EventsInterface& events_interface;
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EventInterface& events_interface;
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};
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};
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} // namespace Service::Nvidia::Devices
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} // namespace Service::Nvidia::Devices
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namespace Service::Nvidia::Devices {
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namespace Service::Nvidia::Devices {
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nvhost_ctrl_gpu::nvhost_ctrl_gpu(Core::System& system) : nvdevice(system){};
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nvhost_ctrl_gpu::nvhost_ctrl_gpu(Core::System& system) : nvdevice(system) {}
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nvhost_ctrl_gpu::~nvhost_ctrl_gpu() = default;
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nvhost_ctrl_gpu::~nvhost_ctrl_gpu() = default;
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u32 nvhost_ctrl_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 nvhost_ctrl_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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@ -13,7 +13,7 @@ namespace Service::Nvidia::Devices {
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class nvhost_ctrl_gpu final : public nvdevice {
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class nvhost_ctrl_gpu final : public nvdevice {
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public:
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public:
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nvhost_ctrl_gpu(Core::System& system);
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explicit nvhost_ctrl_gpu(Core::System& system);
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~nvhost_ctrl_gpu() override;
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~nvhost_ctrl_gpu() override;
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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namespace Service::Nvidia::Devices {
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namespace Service::Nvidia::Devices {
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nvhost_nvdec::nvhost_nvdec(Core::System& system) : nvdevice(system){};
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nvhost_nvdec::nvhost_nvdec(Core::System& system) : nvdevice(system) {}
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nvhost_nvdec::~nvhost_nvdec() = default;
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nvhost_nvdec::~nvhost_nvdec() = default;
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u32 nvhost_nvdec::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 nvhost_nvdec::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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@ -13,7 +13,7 @@ namespace Service::Nvidia::Devices {
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class nvhost_nvdec final : public nvdevice {
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class nvhost_nvdec final : public nvdevice {
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public:
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public:
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nvhost_nvdec(Core::System& system);
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explicit nvhost_nvdec(Core::System& system);
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~nvhost_nvdec() override;
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~nvhost_nvdec() override;
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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namespace Service::Nvidia::Devices {
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namespace Service::Nvidia::Devices {
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nvhost_nvjpg::nvhost_nvjpg(Core::System& system) : nvdevice(system){};
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nvhost_nvjpg::nvhost_nvjpg(Core::System& system) : nvdevice(system) {}
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nvhost_nvjpg::~nvhost_nvjpg() = default;
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nvhost_nvjpg::~nvhost_nvjpg() = default;
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u32 nvhost_nvjpg::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 nvhost_nvjpg::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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class nvhost_nvjpg final : public nvdevice {
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class nvhost_nvjpg final : public nvdevice {
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public:
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public:
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nvhost_nvjpg(Core::System& system);
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explicit nvhost_nvjpg(Core::System& system);
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~nvhost_nvjpg() override;
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~nvhost_nvjpg() override;
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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namespace Service::Nvidia::Devices {
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namespace Service::Nvidia::Devices {
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nvhost_vic::nvhost_vic(Core::System& system) : nvdevice(system){};
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nvhost_vic::nvhost_vic(Core::System& system) : nvdevice(system) {}
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nvhost_vic::~nvhost_vic() = default;
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nvhost_vic::~nvhost_vic() = default;
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u32 nvhost_vic::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 nvhost_vic::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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class nvhost_vic final : public nvdevice {
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class nvhost_vic final : public nvdevice {
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public:
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public:
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nvhost_vic(Core::System& system);
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explicit nvhost_vic(Core::System& system);
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~nvhost_vic() override;
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~nvhost_vic() override;
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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u32 ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output,
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};
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};
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}
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}
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nvmap::nvmap(Core::System& system) : nvdevice(system){};
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nvmap::nvmap(Core::System& system) : nvdevice(system) {}
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nvmap::~nvmap() = default;
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nvmap::~nvmap() = default;
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VAddr nvmap::GetObjectAddress(u32 handle) const {
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VAddr nvmap::GetObjectAddress(u32 handle) const {
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class nvmap final : public nvdevice {
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class nvmap final : public nvdevice {
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public:
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public:
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nvmap(Core::System& system);
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explicit nvmap(Core::System& system);
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~nvmap() override;
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~nvmap() override;
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/// Returns the allocated address of an nvmap object given its handle.
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/// Returns the allocated address of an nvmap object given its handle.
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@ -100,11 +100,11 @@ void Module::SignalSyncpt(const u32 syncpoint_id, const u32 value) {
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}
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}
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}
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}
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Kernel::SharedPtr<Kernel::ReadableEvent> Module::GetEvent(const u32 event_id) {
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Kernel::SharedPtr<Kernel::ReadableEvent> Module::GetEvent(const u32 event_id) const {
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return events_interface.events[event_id].readable;
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return events_interface.events[event_id].readable;
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}
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}
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Kernel::SharedPtr<Kernel::WritableEvent> Module::GetEventWriteable(const u32 event_id) {
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Kernel::SharedPtr<Kernel::WritableEvent> Module::GetEventWriteable(const u32 event_id) const {
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return events_interface.events[event_id].writable;
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return events_interface.events[event_id].writable;
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}
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}
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class nvdevice;
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class nvdevice;
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}
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}
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struct EventsInterface {
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struct EventInterface {
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u64 events_mask{};
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u64 events_mask{};
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std::array<Kernel::EventPair, MaxNvEvents> events;
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std::array<Kernel::EventPair, MaxNvEvents> events;
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std::array<EventState, MaxNvEvents> status{};
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std::array<EventState, MaxNvEvents> status{};
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std::array<bool, MaxNvEvents> registered{};
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std::array<bool, MaxNvEvents> registered{};
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std::array<u32, MaxNvEvents> assigned_syncpt{};
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std::array<u32, MaxNvEvents> assigned_syncpt{};
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std::array<u32, MaxNvEvents> assigned_value{};
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std::array<u32, MaxNvEvents> assigned_value{};
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u32 GetFreeEvent() {
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static constexpr u32 null_event = 0xFFFFFFFF;
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u32 GetFreeEvent() const {
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u64 mask = events_mask;
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u64 mask = events_mask;
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for (u32 i = 0; i < MaxNvEvents; i++) {
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for (u32 i = 0; i < MaxNvEvents; i++) {
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const bool is_free = (mask & 0x1) == 0;
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const bool is_free = (mask & 0x1) == 0;
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}
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}
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mask = mask >> 1;
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mask = mask >> 1;
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}
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}
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return 0xFFFFFFFF;
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return null_event;
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}
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}
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void SetEventStatus(const u32 event_id, EventState new_status) {
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void SetEventStatus(const u32 event_id, EventState new_status) {
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EventState old_status = status[event_id];
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EventState old_status = status[event_id];
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if (old_status == new_status)
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if (old_status == new_status) {
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return;
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return;
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}
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status[event_id] = new_status;
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status[event_id] = new_status;
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if (new_status == EventState::Registered) {
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if (new_status == EventState::Registered) {
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registered[event_id] = true;
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registered[event_id] = true;
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void SignalSyncpt(const u32 syncpoint_id, const u32 value);
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void SignalSyncpt(const u32 syncpoint_id, const u32 value);
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Kernel::SharedPtr<Kernel::ReadableEvent> GetEvent(const u32 event_id);
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Kernel::SharedPtr<Kernel::ReadableEvent> GetEvent(u32 event_id) const;
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Kernel::SharedPtr<Kernel::WritableEvent> GetEventWriteable(const u32 event_id);
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Kernel::SharedPtr<Kernel::WritableEvent> GetEventWriteable(u32 event_id) const;
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private:
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private:
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/// Id to use for the next open file descriptor.
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/// Id to use for the next open file descriptor.
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/// Mapping of device node names to their implementation.
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/// Mapping of device node names to their implementation.
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||||||
std::unordered_map<std::string, std::shared_ptr<Devices::nvdevice>> devices;
|
std::unordered_map<std::string, std::shared_ptr<Devices::nvdevice>> devices;
|
||||||
|
|
||||||
EventsInterface events_interface;
|
EventInterface events_interface;
|
||||||
};
|
};
|
||||||
|
|
||||||
/// Registers all NVDRV services with the specified service manager.
|
/// Registers all NVDRV services with the specified service manager.
|
||||||
|
|
|
@ -79,7 +79,7 @@ void BufferQueue::QueueBuffer(u32 slot, BufferTransformFlags transform,
|
||||||
}
|
}
|
||||||
|
|
||||||
std::optional<std::reference_wrapper<const BufferQueue::Buffer>> BufferQueue::AcquireBuffer() {
|
std::optional<std::reference_wrapper<const BufferQueue::Buffer>> BufferQueue::AcquireBuffer() {
|
||||||
std::vector<Buffer>::iterator itr = queue.end();
|
auto itr = queue.end();
|
||||||
while (itr == queue.end() && !queue_sequence.empty()) {
|
while (itr == queue.end() && !queue_sequence.empty()) {
|
||||||
u32 slot = queue_sequence.front();
|
u32 slot = queue_sequence.front();
|
||||||
itr = std::find_if(queue.begin(), queue.end(), [&slot](const Buffer& buffer) {
|
itr = std::find_if(queue.begin(), queue.end(), [&slot](const Buffer& buffer) {
|
||||||
|
|
|
@ -37,8 +37,6 @@ NVFlinger::NVFlinger(Core::Timing::CoreTiming& core_timing) : core_timing{core_t
|
||||||
displays.emplace_back(4, "Null");
|
displays.emplace_back(4, "Null");
|
||||||
|
|
||||||
// Schedule the screen composition events
|
// Schedule the screen composition events
|
||||||
// const auto ticks = Settings::values.force_30fps_mode ? frame_ticks_30fps : frame_ticks;
|
|
||||||
|
|
||||||
composition_event = core_timing.RegisterEvent("ScreenComposition", [this](u64 userdata,
|
composition_event = core_timing.RegisterEvent("ScreenComposition", [this](u64 userdata,
|
||||||
s64 cycles_late) {
|
s64 cycles_late) {
|
||||||
Compose();
|
Compose();
|
||||||
|
@ -212,8 +210,9 @@ void NVFlinger::Compose() {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
s64 NVFlinger::GetNextTicks() {
|
s64 NVFlinger::GetNextTicks() const {
|
||||||
return (Core::Timing::BASE_CLOCK_RATE * (1LL << swap_interval)) / 120;
|
constexpr s64 max_hertz = 120LL;
|
||||||
|
return (Core::Timing::BASE_CLOCK_RATE * (1LL << swap_interval)) / max_hertz;
|
||||||
}
|
}
|
||||||
|
|
||||||
} // namespace Service::NVFlinger
|
} // namespace Service::NVFlinger
|
||||||
|
|
|
@ -74,7 +74,7 @@ public:
|
||||||
/// finished.
|
/// finished.
|
||||||
void Compose();
|
void Compose();
|
||||||
|
|
||||||
s64 GetNextTicks();
|
s64 GetNextTicks() const;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
/// Finds the display identified by the specified ID.
|
/// Finds the display identified by the specified ID.
|
||||||
|
|
|
@ -89,8 +89,10 @@ u32 GPU::GetSyncpointValue(const u32 syncpoint_id) const {
|
||||||
}
|
}
|
||||||
|
|
||||||
void GPU::RegisterSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
|
void GPU::RegisterSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
|
||||||
for (u32 in_value : syncpt_interrupts[syncpoint_id]) {
|
auto& interrupt = syncpt_interrupts[syncpoint_id];
|
||||||
if (in_value == value)
|
bool contains = std::any_of(interrupt.begin(), interrupt.end(),
|
||||||
|
[value](u32 in_value) { return in_value == value; });
|
||||||
|
if (contains) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
syncpt_interrupts[syncpoint_id].emplace_back(value);
|
syncpt_interrupts[syncpoint_id].emplace_back(value);
|
||||||
|
@ -98,16 +100,17 @@ void GPU::RegisterSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
|
||||||
|
|
||||||
bool GPU::CancelSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
|
bool GPU::CancelSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
|
||||||
std::lock_guard lock{sync_mutex};
|
std::lock_guard lock{sync_mutex};
|
||||||
auto it = syncpt_interrupts[syncpoint_id].begin();
|
auto& interrupt = syncpt_interrupts[syncpoint_id];
|
||||||
while (it != syncpt_interrupts[syncpoint_id].end()) {
|
const auto iter =
|
||||||
if (value == *it) {
|
std::find_if(interrupt.begin(), interrupt.end(),
|
||||||
it = syncpt_interrupts[syncpoint_id].erase(it);
|
[value](u32 interrupt_value) { return value == interrupt_value; });
|
||||||
return true;
|
|
||||||
}
|
if (iter == interrupt.end()) {
|
||||||
it++;
|
|
||||||
}
|
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
interrupt.erase(iter);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
|
u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
|
||||||
ASSERT(format != RenderTargetFormat::NONE);
|
ASSERT(format != RenderTargetFormat::NONE);
|
||||||
|
|
|
@ -168,20 +168,16 @@ public:
|
||||||
/// Returns a reference to the GPU DMA pusher.
|
/// Returns a reference to the GPU DMA pusher.
|
||||||
Tegra::DmaPusher& DmaPusher();
|
Tegra::DmaPusher& DmaPusher();
|
||||||
|
|
||||||
void IncrementSyncPoint(const u32 syncpoint_id);
|
void IncrementSyncPoint(u32 syncpoint_id);
|
||||||
|
|
||||||
u32 GetSyncpointValue(const u32 syncpoint_id) const;
|
u32 GetSyncpointValue(u32 syncpoint_id) const;
|
||||||
|
|
||||||
void RegisterSyncptInterrupt(const u32 syncpoint_id, const u32 value);
|
void RegisterSyncptInterrupt(u32 syncpoint_id, u32 value);
|
||||||
|
|
||||||
bool CancelSyncptInterrupt(const u32 syncpoint_id, const u32 value);
|
bool CancelSyncptInterrupt(u32 syncpoint_id, u32 value);
|
||||||
|
|
||||||
void Guard(bool guard_set) {
|
std::unique_lock<std::mutex> LockSync() {
|
||||||
if (guard_set) {
|
return std::unique_lock{sync_mutex};
|
||||||
sync_mutex.lock();
|
|
||||||
} else {
|
|
||||||
sync_mutex.unlock();
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool IsAsync() const {
|
bool IsAsync() const {
|
||||||
|
@ -253,7 +249,7 @@ public:
|
||||||
virtual void FlushAndInvalidateRegion(CacheAddr addr, u64 size) = 0;
|
virtual void FlushAndInvalidateRegion(CacheAddr addr, u64 size) = 0;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual void TriggerCpuInterrupt(const u32 syncpoint_id, const u32 value) const = 0;
|
virtual void TriggerCpuInterrupt(u32 syncpoint_id, u32 value) const = 0;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
void ProcessBindMethod(const MethodCall& method_call);
|
void ProcessBindMethod(const MethodCall& method_call);
|
||||||
|
|
|
@ -28,7 +28,7 @@ public:
|
||||||
void FlushAndInvalidateRegion(CacheAddr addr, u64 size) override;
|
void FlushAndInvalidateRegion(CacheAddr addr, u64 size) override;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void TriggerCpuInterrupt(const u32 syncpoint_id, const u32 value) const override;
|
void TriggerCpuInterrupt(u32 syncpoint_id, u32 value) const override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
GPUThread::ThreadManager gpu_thread;
|
GPUThread::ThreadManager gpu_thread;
|
||||||
|
|
|
@ -27,7 +27,8 @@ public:
|
||||||
void FlushAndInvalidateRegion(CacheAddr addr, u64 size) override;
|
void FlushAndInvalidateRegion(CacheAddr addr, u64 size) override;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void TriggerCpuInterrupt(const u32 syncpoint_id, const u32 value) const override {}
|
void TriggerCpuInterrupt([[maybe_unused]] u32 syncpoint_id,
|
||||||
|
[[maybe_unused]] u32 value) const override {}
|
||||||
};
|
};
|
||||||
|
|
||||||
} // namespace VideoCommon
|
} // namespace VideoCommon
|
||||||
|
|
Reference in New Issue