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Merge pull request #439 from ogniK5377/GetTPCMasks 

More accurate GetTPCMasks impl
This commit is contained in:
bunnei 2018-05-11 12:57:20 -04:00 committed by GitHub
parent 5e9c547952 e7b0e8a3cc
commit e07218906d
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 8 additions and 4 deletions
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10
src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
View File

@ -77,9 +77,13 @@ u32 nvhost_ctrl_gpu::GetCharacteristics(const std::vector<u8>& input, std::vecto
u32 nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output) {
IoctlGpuGetTpcMasksArgs params{};
std::memcpy(&params, input.data(), input.size());
NGLOG_WARNING(Service_NVDRV, "(STUBBED) called, mask=0x{:X}, mask_buf_addr=0x{:X}",
params.mask_buf_size, params.mask_buf_addr);
params.unk = 0xcafe; // TODO(ogniK): Needs to be non 0, what does this actually do?
NGLOG_INFO(Service_NVDRV, "called, mask=0x{:X}, mask_buf_addr=0x{:X}", params.mask_buf_size,
params.mask_buf_addr);
// TODO(ogniK): Confirm value on hardware
if (params.mask_buf_size)
params.tpc_mask_size = 4 * 1; // 4 * num_gpc
else
params.tpc_mask_size = 0;
std::memcpy(output.data(), &params, sizeof(params));
return 0;
}

2
src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
View File

@ -86,7 +86,7 @@ private:
/// [in] pointer to TPC mask buffer. It will receive one 32-bit TPC mask per GPC or 0 if
/// GPC is not enabled or not present. This parameter is ignored if mask_buf_size is 0.
u64_le mask_buf_addr;
u64_le unk; // Nintendo add this?
u64_le tpc_mask_size; // Nintendo add this?
};
static_assert(sizeof(IoctlGpuGetTpcMasksArgs) == 24,
"IoctlGpuGetTpcMasksArgs is incorrect size");