shader: Accelerate pipeline transitions and use dirty flags for shaders
This commit is contained in:
parent
20e86fd615
commit
f4ace63957
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@ -58,6 +58,11 @@ void SetupDirtyRenderTargets(Maxwell3D::DirtyState::Tables& tables) {
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FillBlock(table, OFF(zeta), NUM(zeta), flag);
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}
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}
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void SetupDirtyShaders(Maxwell3D::DirtyState::Tables& tables) {
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FillBlock(tables[0], OFF(shader_config[0]),
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NUM(shader_config[0]) * Maxwell3D::Regs::MaxShaderProgram, Shaders);
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}
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} // Anonymous namespace
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void SetupDirtyFlags(Maxwell3D::DirtyState::Tables& tables) {
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@ -65,6 +70,7 @@ void SetupDirtyFlags(Maxwell3D::DirtyState::Tables& tables) {
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SetupIndexBuffer(tables);
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SetupDirtyDescriptors(tables);
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SetupDirtyRenderTargets(tables);
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SetupDirtyShaders(tables);
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}
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} // namespace VideoCommon::Dirty
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@ -36,6 +36,8 @@ enum : u8 {
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IndexBuffer,
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Shaders,
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LastCommonEntry,
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};
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@ -635,7 +635,7 @@ void RasterizerOpenGL::SyncDepthClamp() {
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void RasterizerOpenGL::SyncClipEnabled(u32 clip_mask) {
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auto& flags = maxwell3d.dirty.flags;
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if (!flags[Dirty::ClipDistances] && !flags[Dirty::Shaders]) {
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if (!flags[Dirty::ClipDistances] && !flags[VideoCommon::Dirty::Shaders]) {
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return;
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}
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flags[Dirty::ClipDistances] = false;
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@ -83,11 +83,6 @@ void SetupDirtyScissors(Tables& tables) {
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FillBlock(tables[1], OFF(scissor_test), NUM(scissor_test), Scissors);
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}
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void SetupDirtyShaders(Tables& tables) {
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FillBlock(tables[0], OFF(shader_config[0]), NUM(shader_config[0]) * Regs::MaxShaderProgram,
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Shaders);
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}
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void SetupDirtyPolygonModes(Tables& tables) {
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tables[0][OFF(polygon_mode_front)] = PolygonModeFront;
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tables[0][OFF(polygon_mode_back)] = PolygonModeBack;
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@ -217,7 +212,6 @@ StateTracker::StateTracker(Tegra::GPU& gpu) : flags{gpu.Maxwell3D().dirty.flags}
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SetupDirtyScissors(tables);
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SetupDirtyVertexInstances(tables);
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SetupDirtyVertexFormat(tables);
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SetupDirtyShaders(tables);
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SetupDirtyPolygonModes(tables);
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SetupDirtyDepthTest(tables);
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SetupDirtyStencilTest(tables);
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@ -52,7 +52,6 @@ enum : u8 {
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BlendState0,
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BlendState7 = BlendState0 + 7,
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Shaders,
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ClipDistances,
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PolygonModes,
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@ -125,13 +125,12 @@ GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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VKUpdateDescriptorQueue& update_descriptor_queue_,
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Common::ThreadWorker* worker_thread,
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RenderPassCache& render_pass_cache,
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const FixedPipelineState& state_,
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const GraphicsPipelineCacheKey& key_,
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std::array<vk::ShaderModule, NUM_STAGES> stages,
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const std::array<const Shader::Info*, NUM_STAGES>& infos)
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: maxwell3d{maxwell3d_}, gpu_memory{gpu_memory_}, texture_cache{texture_cache_},
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: key{key_}, maxwell3d{maxwell3d_}, gpu_memory{gpu_memory_}, texture_cache{texture_cache_},
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buffer_cache{buffer_cache_}, scheduler{scheduler_},
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update_descriptor_queue{update_descriptor_queue_}, state{state_}, spv_modules{
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std::move(stages)} {
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update_descriptor_queue{update_descriptor_queue_}, spv_modules{std::move(stages)} {
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std::ranges::transform(infos, stage_infos.begin(),
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[](const Shader::Info* info) { return info ? *info : Shader::Info{}; });
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@ -144,7 +143,7 @@ GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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pipeline_layout = builder.CreatePipelineLayout(set_layout);
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descriptor_update_template = builder.CreateTemplate(set_layout, *pipeline_layout);
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const VkRenderPass render_pass{render_pass_cache.Get(MakeRenderPassKey(state))};
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const VkRenderPass render_pass{render_pass_cache.Get(MakeRenderPassKey(key.state))};
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MakePipeline(device, render_pass);
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std::lock_guard lock{build_mutex};
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@ -158,6 +157,11 @@ GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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}
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}
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void GraphicsPipeline::AddTransition(GraphicsPipeline* transition) {
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transition_keys.push_back(transition->key);
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transitions.push_back(transition);
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}
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void GraphicsPipeline::Configure(bool is_indexed) {
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static constexpr size_t max_images_elements = 64;
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std::array<ImageId, max_images_elements> image_view_ids;
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@ -294,12 +298,12 @@ void GraphicsPipeline::Configure(bool is_indexed) {
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void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pass) {
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FixedPipelineState::DynamicState dynamic{};
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if (!device.IsExtExtendedDynamicStateSupported()) {
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dynamic = state.dynamic_state;
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dynamic = key.state.dynamic_state;
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}
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static_vector<VkVertexInputBindingDescription, 32> vertex_bindings;
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static_vector<VkVertexInputBindingDivisorDescriptionEXT, 32> vertex_binding_divisors;
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for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const bool instanced = state.binding_divisors[index] != 0;
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const bool instanced = key.state.binding_divisors[index] != 0;
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const auto rate = instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
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vertex_bindings.push_back({
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.binding = static_cast<u32>(index),
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@ -309,14 +313,14 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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if (instanced) {
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vertex_binding_divisors.push_back({
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.binding = static_cast<u32>(index),
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.divisor = state.binding_divisors[index],
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.divisor = key.state.binding_divisors[index],
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});
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}
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}
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static_vector<VkVertexInputAttributeDescription, 32> vertex_attributes;
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const auto& input_attributes = stage_infos[0].input_generics;
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for (size_t index = 0; index < state.attributes.size(); ++index) {
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const auto& attribute = state.attributes[index];
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for (size_t index = 0; index < key.state.attributes.size(); ++index) {
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const auto& attribute = key.state.attributes[index];
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if (!attribute.enabled || !input_attributes[index].used) {
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continue;
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}
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@ -345,7 +349,7 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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if (!vertex_binding_divisors.empty()) {
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vertex_input_ci.pNext = &input_divisor_ci;
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}
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auto input_assembly_topology = MaxwellToVK::PrimitiveTopology(device, state.topology);
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auto input_assembly_topology = MaxwellToVK::PrimitiveTopology(device, key.state.topology);
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if (input_assembly_topology == VK_PRIMITIVE_TOPOLOGY_PATCH_LIST) {
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if (!spv_modules[1] && !spv_modules[2]) {
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LOG_WARNING(Render_Vulkan, "Patch topology used without tessellation, using points");
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@ -357,14 +361,14 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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.pNext = nullptr,
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.flags = 0,
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.topology = input_assembly_topology,
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.primitiveRestartEnable = state.primitive_restart_enable != 0 &&
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.primitiveRestartEnable = key.state.primitive_restart_enable != 0 &&
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SupportsPrimitiveRestart(input_assembly_topology),
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};
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const VkPipelineTessellationStateCreateInfo tessellation_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO,
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.pNext = nullptr,
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.flags = 0,
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.patchControlPoints = state.patch_control_points_minus_one.Value() + 1,
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.patchControlPoints = key.state.patch_control_points_minus_one.Value() + 1,
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};
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VkPipelineViewportStateCreateInfo viewport_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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@ -376,7 +380,7 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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.pScissors = nullptr,
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};
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std::array<VkViewportSwizzleNV, Maxwell::NumViewports> swizzles;
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std::ranges::transform(state.viewport_swizzles, swizzles.begin(), UnpackViewportSwizzle);
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std::ranges::transform(key.state.viewport_swizzles, swizzles.begin(), UnpackViewportSwizzle);
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VkPipelineViewportSwizzleStateCreateInfoNV swizzle_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_SWIZZLE_STATE_CREATE_INFO_NV,
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.pNext = nullptr,
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@ -393,15 +397,15 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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.pNext = nullptr,
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.flags = 0,
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.depthClampEnable =
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static_cast<VkBool32>(state.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE),
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static_cast<VkBool32>(key.state.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE),
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.rasterizerDiscardEnable =
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static_cast<VkBool32>(state.rasterize_enable == 0 ? VK_TRUE : VK_FALSE),
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static_cast<VkBool32>(key.state.rasterize_enable == 0 ? VK_TRUE : VK_FALSE),
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.polygonMode =
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MaxwellToVK::PolygonMode(FixedPipelineState::UnpackPolygonMode(state.polygon_mode)),
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MaxwellToVK::PolygonMode(FixedPipelineState::UnpackPolygonMode(key.state.polygon_mode)),
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.cullMode = static_cast<VkCullModeFlags>(
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dynamic.cull_enable ? MaxwellToVK::CullFace(dynamic.CullFace()) : VK_CULL_MODE_NONE),
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.frontFace = MaxwellToVK::FrontFace(dynamic.FrontFace()),
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.depthBiasEnable = state.depth_bias_enable,
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.depthBiasEnable = key.state.depth_bias_enable,
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.depthBiasConstantFactor = 0.0f,
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.depthBiasClamp = 0.0f,
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.depthBiasSlopeFactor = 0.0f,
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@ -411,7 +415,7 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.pNext = nullptr,
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.flags = 0,
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.rasterizationSamples = MaxwellToVK::MsaaMode(state.msaa_mode),
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.rasterizationSamples = MaxwellToVK::MsaaMode(key.state.msaa_mode),
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.sampleShadingEnable = VK_FALSE,
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.minSampleShading = 0.0f,
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.pSampleMask = nullptr,
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@ -435,7 +439,7 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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.maxDepthBounds = 0.0f,
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};
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static_vector<VkPipelineColorBlendAttachmentState, Maxwell::NumRenderTargets> cb_attachments;
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const size_t num_attachments{NumAttachments(state)};
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const size_t num_attachments{NumAttachments(key.state)};
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for (size_t index = 0; index < num_attachments; ++index) {
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static constexpr std::array mask_table{
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VK_COLOR_COMPONENT_R_BIT,
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@ -443,7 +447,7 @@ void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pa
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VK_COLOR_COMPONENT_B_BIT,
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VK_COLOR_COMPONENT_A_BIT,
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};
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const auto& blend{state.attachments[index]};
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const auto& blend{key.state.attachments[index]};
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const std::array mask{blend.Mask()};
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VkColorComponentFlags write_mask{};
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for (size_t i = 0; i < mask_table.size(); ++i) {
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@ -4,10 +4,12 @@
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#pragma once
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#include <algorithm>
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#include <array>
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#include <atomic>
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#include <condition_variable>
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#include <mutex>
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#include <type_traits>
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#include "common/thread_worker.h"
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#include "shader_recompiler/shader_info.h"
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@ -20,6 +22,39 @@
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namespace Vulkan {
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struct GraphicsPipelineCacheKey {
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std::array<u128, 6> unique_hashes;
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FixedPipelineState state;
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size_t Hash() const noexcept;
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bool operator==(const GraphicsPipelineCacheKey& rhs) const noexcept;
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bool operator!=(const GraphicsPipelineCacheKey& rhs) const noexcept {
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return !operator==(rhs);
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}
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size_t Size() const noexcept {
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return sizeof(unique_hashes) + state.Size();
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}
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};
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static_assert(std::has_unique_object_representations_v<GraphicsPipelineCacheKey>);
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static_assert(std::is_trivially_copyable_v<GraphicsPipelineCacheKey>);
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static_assert(std::is_trivially_constructible_v<GraphicsPipelineCacheKey>);
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} // namespace Vulkan
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namespace std {
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template <>
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struct hash<Vulkan::GraphicsPipelineCacheKey> {
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size_t operator()(const Vulkan::GraphicsPipelineCacheKey& k) const noexcept {
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return k.Hash();
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}
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};
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} // namespace std
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namespace Vulkan {
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class Device;
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class RenderPassCache;
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class VKScheduler;
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@ -35,7 +70,8 @@ public:
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const Device& device, VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue,
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Common::ThreadWorker* worker_thread,
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RenderPassCache& render_pass_cache, const FixedPipelineState& state,
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RenderPassCache& render_pass_cache,
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const GraphicsPipelineCacheKey& key,
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std::array<vk::ShaderModule, NUM_STAGES> stages,
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const std::array<const Shader::Info*, NUM_STAGES>& infos);
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@ -47,16 +83,30 @@ public:
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GraphicsPipeline& operator=(const GraphicsPipeline&) = delete;
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GraphicsPipeline(const GraphicsPipeline&) = delete;
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void AddTransition(GraphicsPipeline* transition);
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GraphicsPipeline* Next(const GraphicsPipelineCacheKey& current_key) noexcept {
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if (key == current_key) {
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return this;
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}
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const auto it{std::find(transition_keys.begin(), transition_keys.end(), current_key)};
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return it != transition_keys.end() ? transitions[std::distance(transition_keys.begin(), it)]
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: nullptr;
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}
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private:
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void MakePipeline(const Device& device, VkRenderPass render_pass);
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const GraphicsPipelineCacheKey key;
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Tegra::Engines::Maxwell3D& maxwell3d;
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Tegra::MemoryManager& gpu_memory;
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TextureCache& texture_cache;
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BufferCache& buffer_cache;
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VKScheduler& scheduler;
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VKUpdateDescriptorQueue& update_descriptor_queue;
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const FixedPipelineState state;
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std::vector<GraphicsPipelineCacheKey> transition_keys;
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std::vector<GraphicsPipeline*> transitions;
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std::array<vk::ShaderModule, NUM_STAGES> spv_modules;
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std::array<Shader::Info, NUM_STAGES> stage_infos;
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@ -21,6 +21,7 @@
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#include "shader_recompiler/frontend/maxwell/control_flow.h"
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#include "shader_recompiler/frontend/maxwell/program.h"
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#include "shader_recompiler/program_header.h"
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#include "video_core/dirty_flags.h"
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#include "video_core/engines/kepler_compute.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/memory_manager.h"
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@ -700,17 +701,28 @@ GraphicsPipeline* PipelineCache::CurrentGraphicsPipeline() {
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MICROPROFILE_SCOPE(Vulkan_PipelineCache);
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if (!RefreshStages()) {
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current_pipeline = nullptr;
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return nullptr;
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}
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graphics_key.state.Refresh(maxwell3d, device.IsExtExtendedDynamicStateSupported());
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if (current_pipeline) {
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GraphicsPipeline* const next{current_pipeline->Next(graphics_key)};
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if (next) {
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current_pipeline = next;
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return current_pipeline;
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}
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}
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const auto [pair, is_new]{graphics_cache.try_emplace(graphics_key)};
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auto& pipeline{pair->second};
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if (!is_new) {
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return pipeline.get();
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}
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if (is_new) {
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pipeline = CreateGraphicsPipeline();
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return pipeline.get();
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}
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if (current_pipeline) {
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current_pipeline->AddTransition(pipeline.get());
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}
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current_pipeline = pipeline.get();
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return current_pipeline;
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}
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ComputePipeline* PipelineCache::CurrentComputePipeline() {
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@ -743,6 +755,12 @@ ComputePipeline* PipelineCache::CurrentComputePipeline() {
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}
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bool PipelineCache::RefreshStages() {
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auto& dirty{maxwell3d.dirty.flags};
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if (!dirty[VideoCommon::Dirty::Shaders]) {
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return last_valid_shaders;
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}
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dirty[VideoCommon::Dirty::Shaders] = false;
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const GPUVAddr base_addr{maxwell3d.regs.code_address.CodeAddress()};
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for (size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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if (!maxwell3d.regs.IsShaderConfigEnabled(index)) {
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@ -755,6 +773,7 @@ bool PipelineCache::RefreshStages() {
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const std::optional<VAddr> cpu_shader_addr{gpu_memory.GpuToCpuAddress(shader_addr)};
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if (!cpu_shader_addr) {
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LOG_ERROR(Render_Vulkan, "Invalid GPU address for shader 0x{:016x}", shader_addr);
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last_valid_shaders = false;
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return false;
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}
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const ShaderInfo* shader_info{TryGet(*cpu_shader_addr)};
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@ -766,6 +785,7 @@ bool PipelineCache::RefreshStages() {
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shader_infos[index] = shader_info;
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graphics_key.unique_hashes[index] = shader_info->unique_hash;
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}
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last_valid_shaders = true;
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return true;
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}
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@ -832,8 +852,7 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline(
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Common::ThreadWorker* const thread_worker{build_in_parallel ? &workers : nullptr};
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return std::make_unique<GraphicsPipeline>(
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maxwell3d, gpu_memory, scheduler, buffer_cache, texture_cache, device, descriptor_pool,
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update_descriptor_queue, thread_worker, render_pass_cache, key.state, std::move(modules),
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infos);
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update_descriptor_queue, thread_worker, render_pass_cache, key, std::move(modules), infos);
|
||||
}
|
||||
|
||||
std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
|
||||
|
|
|
@ -58,26 +58,6 @@ static_assert(std::has_unique_object_representations_v<ComputePipelineCacheKey>)
|
|||
static_assert(std::is_trivially_copyable_v<ComputePipelineCacheKey>);
|
||||
static_assert(std::is_trivially_constructible_v<ComputePipelineCacheKey>);
|
||||
|
||||
struct GraphicsPipelineCacheKey {
|
||||
std::array<u128, 6> unique_hashes;
|
||||
FixedPipelineState state;
|
||||
|
||||
size_t Hash() const noexcept;
|
||||
|
||||
bool operator==(const GraphicsPipelineCacheKey& rhs) const noexcept;
|
||||
|
||||
bool operator!=(const GraphicsPipelineCacheKey& rhs) const noexcept {
|
||||
return !operator==(rhs);
|
||||
}
|
||||
|
||||
size_t Size() const noexcept {
|
||||
return sizeof(unique_hashes) + state.Size();
|
||||
}
|
||||
};
|
||||
static_assert(std::has_unique_object_representations_v<GraphicsPipelineCacheKey>);
|
||||
static_assert(std::is_trivially_copyable_v<GraphicsPipelineCacheKey>);
|
||||
static_assert(std::is_trivially_constructible_v<GraphicsPipelineCacheKey>);
|
||||
|
||||
} // namespace Vulkan
|
||||
|
||||
namespace std {
|
||||
|
@ -89,13 +69,6 @@ struct hash<Vulkan::ComputePipelineCacheKey> {
|
|||
}
|
||||
};
|
||||
|
||||
template <>
|
||||
struct hash<Vulkan::GraphicsPipelineCacheKey> {
|
||||
size_t operator()(const Vulkan::GraphicsPipelineCacheKey& k) const noexcept {
|
||||
return k.Hash();
|
||||
}
|
||||
};
|
||||
|
||||
} // namespace std
|
||||
|
||||
namespace Vulkan {
|
||||
|
@ -181,7 +154,10 @@ private:
|
|||
TextureCache& texture_cache;
|
||||
|
||||
GraphicsPipelineCacheKey graphics_key{};
|
||||
GraphicsPipeline* current_pipeline{};
|
||||
|
||||
std::array<const ShaderInfo*, 6> shader_infos{};
|
||||
bool last_valid_shaders{};
|
||||
|
||||
std::unordered_map<ComputePipelineCacheKey, std::unique_ptr<ComputePipeline>> compute_cache;
|
||||
std::unordered_map<GraphicsPipelineCacheKey, std::unique_ptr<GraphicsPipeline>> graphics_cache;
|
||||
|
|
Reference in New Issue