shader: Fix IADD3.CC
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53acdda772
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fb14820c86
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@ -73,21 +73,13 @@ void IADD3(TranslatorVisitor& v, u64 insn, IR::U32 op_b, IR::U32 op_c) {
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op_c = v.ir.INeg(op_c);
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}
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IR::U32 lhs{v.ir.IAdd(op_a, op_b)};
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IR::U1 of_1;
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if (iadd3.cc != 0) {
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of_1 = v.ir.GetOverflowFromOp(lhs);
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}
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IR::U32 lhs_1{v.ir.IAdd(op_a, op_b)};
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if (iadd3.x != 0) {
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const IR::U32 carry{v.ir.Select(v.ir.GetCFlag(), v.ir.Imm32(1), v.ir.Imm32(0))};
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lhs = v.ir.IAdd(lhs, carry);
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lhs_1 = v.ir.IAdd(lhs_1, carry);
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}
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if (iadd3.cc != 0 && iadd3.shift == Shift::Left) {
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const IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))};
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of_1 = v.ir.LogicalOr(of_1, v.ir.INotEqual(v.ir.Imm32(0), high_bits));
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}
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lhs = IntegerShift(v.ir, lhs, iadd3.shift);
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const IR::U32 result{v.ir.IAdd(lhs, op_c)};
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const IR::U32 lhs_2{IntegerShift(v.ir, lhs_1, iadd3.shift)};
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const IR::U32 result{v.ir.IAdd(lhs_2, op_c)};
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v.X(iadd3.dest_reg, result);
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if (iadd3.cc != 0) {
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@ -98,6 +90,7 @@ void IADD3(TranslatorVisitor& v, u64 insn, IR::U32 op_b, IR::U32 op_c) {
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v.SetZFlag(v.ir.GetZeroFromOp(result));
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v.SetSFlag(v.ir.GetSignFromOp(result));
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v.SetCFlag(v.ir.GetCarryFromOp(result));
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const IR::U1 of_1{v.ir.ILessThan(lhs_1, op_a, false)};
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v.SetOFlag(v.ir.LogicalOr(v.ir.GetOverflowFromOp(result), of_1));
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}
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}
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